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參數(shù)資料
| 型號(hào)： | L9214A |
| 廠商： | Lineage Power |
| 英文描述： | Low-Cost Ringing SLIC(低價(jià)格振鈴用戶環(huán)路接口電路) |
| 中文描述： | 低成本振鈴用戶接口（低價(jià)格振鈴用戶環(huán)路接口電路） |
| 文件頁數(shù)： | 25/44頁 |
| 文件大小： | 964K |
| 代理商： | L9214A |
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Preliminary Data Sheet
October 2000
Low-Cost Ringing SLIC
L9214A/G
Lucent Technologies Inc.
25
Applications
(continued)
Overhead Voltage
(continued)
Ring Mode
In the ring mode, to maximize ringing loop length, the
overhead is decreased to the saturation of the tip ring
drive amplifiers, a nominal 4 V. The tip to ground volt-
age is 1 V, and the ring to V
BAT1
voltage is 3 V.
The AX amplifier at VTX is active during the ring mode,
differential ring current may be sensed at VTX during
the ring mode.
Loop Range
The dc loop range for medium-loop applications is cal-
culated using:
I
LOOP
The dc loop range for short-loop applications is calcu-
lated using:
where:
V
OHH
= 19.5 (2.5 V + 17 V) and
V
OHL
= 3.4 V (2.5 V + 0.9 V)
and where:
R
L
= loop resistance, not including protection resistors.
R
P
= protection resistor value.
Rdc = SLIC internal dc feed resistance.
|V
BAT1
| and |V
BAT2
| = battery voltage magnitude.
I
LOOP
= loop current.
V
OHH
= overhead voltage when power is drawn from
V
BAT1
.
V
OHL
= overhead voltage when power is drawn from
V
BAT2
.
The point of change over between V
BAT2
and V
BAT1
occurs at:
|V
BAT2
| – (0.9 + 2.5) V > [(2R
P
+ R
DC
+ R
L
) * I
LOOP
] V
V
BAT2
is typically applied under off-hook conditions for
power conservation and SLIC thermal considerations.
The L9214 is intended for short- and medium-loop
applications and, therefore, will always be in current
limit during off-hook conditions. However, note that the
ringing loop length rather than the dc loop length will be
the factor to determine operating loop length. Where
V
BAT2
is insufficient to support the loop length, the
power will be taken from V
BAT1
.
Battery Reversal Rate
The rate of battery reverse is controlled or ramped by
capacitors FB1 and FB2. A chart showing FB1/FB2 val-
ues versus typical ramp time is given below. Leave
FB1 and FB2 open if it is not desired to ramp the rate of
battery reversal.
Table 14. FB1/FB2 Values vs. Typical Ramp Time at
V
BAT1
= –65 V
R
L
)
----------------------------------------------
2R
P
–
R
dc
–
=
R
L
----------------------------------------------
(
)
I
LOOP
2R
P
–
R
dc
–
=
C
FB1
/C
FB2
Transition Time
High, B3 = 0
7 ms
75 ms
145 ms
300 ms
600 ms
750 ms
830 ms
900 ms
1070 ms
Transition Time
Low, B3 = 1
20 ms
220 ms
440 ms
900 ms
1.8 s
2.25 s
2.5 s
2.7 s
3.2 s
0.01
μ
F
0.1
μ
F
0.22
μ
F
0.47
μ
F
1.0
μ
F
1.22
μ
F
1.3
μ
F
1.4
μ
F
1.6
μ
F
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|---|---|
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| L9217A | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface with Reverse Battery and PPM |
| L9218A | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface |
| L9219A | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface with Reverse Battery and Dual Current Limit |
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