- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384587 > L9214A (Lineage Power) Low-Cost Ringing SLIC(低價(jià)格振鈴用戶環(huán)路接口電路) PDF資料下載
參數(shù)資料
| 型號： | L9214A |
| 廠商： | Lineage Power |
| 英文描述： | Low-Cost Ringing SLIC(低價(jià)格振鈴用戶環(huán)路接口電路) |
| 中文描述： | 低成本振鈴用戶接口（低價(jià)格振鈴用戶環(huán)路接口電路） |
| 文件頁數(shù)： | 23/44頁 |
| 文件大?。?/td> | 964K |
| 代理商： | L9214A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁當(dāng)前第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁
Preliminary Data Sheet
October 2000
Low-Cost Ringing SLIC
L9214A/G
Lucent Technologies Inc.
23
Applications
Power Control
Under normal device operating conditions, power dissi-
pation must be controlled to prevent the device temper-
ature from rising too close to the thermal shutdown
point. Power dissipation is highest with higher battery
voltages, higher current limit, and under shorter dc loop
conditions. Additionally, higher ambient temperature
will reduce thermal margin. Increasing the number of
PC board layers and increasing airflow around the
device are typical ways of improving thermal margin.
The maximum recommended junction temperature for
the L9214 is 150
°C. The junction temperature is:
Tj = T
AMBIENT
+
θ
JA
* P
SLIC
The thermal impedance of this device depends on the
package type as well as number of PCB layers and air-
flow. The thermal impedance of the 28-pin SOG pack-
age is somewhat higher than the 32-pin PLCC
package. The 28-pin SOG package in still air with a
single-sided PCB is rated at 70 °C/W. The 32-pin
PLCC package thermal impedance with no airflow on a
four-layer PCB is estimated at 37 °C/W.
The power handling capability of the package is:
P
SLIC
= (150 °C – T
AMBIENT
)/
θ
JA
which is a minimum of 0.93 W for the 28-pin SOG
package with a single-sided PCB and no airflow and as
much as 2.15 W for the 32-pin PLCC package with a
multilayer PCB.
This device is intended to operate with a high-voltage
primary battery of –63 V to –70 V. Under short-loop
conditions, an internal soft battery switch shunts most
(all but I
BIAS
= 3.5 mA) of the loop current to an auxiliary
battery of lower absolute voltage (typically –24 V).
Where single battery operation is required, an external
power control resistor can be connected from the V
BAT2
pin to V
BAT1
and all but 3.5 mA of the loop current will
flow through the power control resistor.
The power dissipated in the device is best illustrated by
an example. Assume V
BAT1
is –65 V, V
BAT2
is –24 V,
and the current limit is set to 30 mA. Given the current
limit tolerance of 10%, the maximum current limit is
33 mA. Also assume 20
of wire resistance, 30
pro-
tection resistance, and 200
for the handset.
Total SLIC power is calculated as:
Total P
D
in SLIC = battery power due to loop current +
SLIC quiescent power – power delivered to loop and
protection resistors.
The battery power due to loop current is:
{[(I
LOOP
– I
BIAS
) * V
BAT2
] + (I
BIAS
* V
BAT1
)} mW =
{[(33 mA – 3.5 mA) * 24 V ] + (3.5 mA * 65 V)}
= 935.5 mW
Under these conditions, the worst-case SLIC quiescent
(on-hook) power is 186 mW.
The power delivered to the loop and protection resis-
tors is:
I
LOOP
* I
LOOP
* [R
HANDSET
+ R
WIRE
+ (2 * R
PROTECTION
)]
= {33 mA * 33 mA * [200
+ 20
+ (2 * 30
)]}
= 305 mW
Thus, the total SLIC power is:
SLIC P
D
= 935.5 mW + 186 mW – 305 mW =
816.5 mW for this example.
Since the minimum power handling capability of the
28-pin SOG package is 0.93 W, in this case either
package type is acceptable even with a single-sided
PCB. At higher battery voltages, higher ambient tem-
perature, and higher current limit, the required thermal
impedance drops and the 32-pin PLCC package, more
PCB layers, or some airflow might be required.
Another case to consider is the case of the power con-
trol resistor. In this case, the effective V
BAT2
voltage is:
V
BAT2
= V
BAT1
– R
PWR
* (I
LOOP
– I
BIAS
)
For the case of the 33 mA maximum current limit,
choosing R
PWR
= 1.39 k
would give V
BAT2
= –24 V and
the same SLIC power as above. The power in the
resistor would be:
P
RPWR
= (I
LOOP
– I
BIAS
) * (I
LOOP
– I
BIAS
) * R
PWR
= 1.2 W
Choosing a larger R
PWR
would result in lower V
BAT2
and
lower SLIC power, but more power in the resistor. Simi-
larly, choosing a smaller R
PWR
results in higher V
BAT2
,
higher SLIC power, and less power in the resistor.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| L9214G | Low-Cost Ringing SLIC(低價(jià)格振鈴用戶環(huán)路接口電路) |
| L9215G | Short-Loop Sine Wave Ringing SLIC(短環(huán)路正弦波振鈴用戶接口（SLIC）) |
| L9215A | Short-Loop Sine Wave Ringing SLIC(短環(huán)路正弦波振鈴用戶接口（SLIC）) |
| L9216A | Short-Loop Ringing SLIC with Ground Start(接地起動(dòng)的短環(huán)路振鈴用戶接口) |
| L9216G | Short-Loop Ringing SLIC with Ground Start(接地起動(dòng)的短環(huán)路振鈴用戶接口) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| L9215A | 制造商:AGERE 制造商全稱:AGERE 功能描述:Short-Loop Sine Wave Ringing SLIC |
| L9216A | 制造商:AGERE 制造商全稱:AGERE 功能描述:Short-Loop Ringing SLIC with Ground Start |
| L9217A | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface with Reverse Battery and PPM |
| L9218A | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface |
| L9219A | 制造商:AGERE 制造商全稱:AGERE 功能描述:Low-Cost Line Interface with Reverse Battery and Dual Current Limit |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。