參數(shù)資料
型號: L8229
廠商: STMICROELECTRONICS
元件分類: 運動控制電子
英文描述: STEPPER MOTOR CONTROLLER, 1.5 A, PDSO24
封裝: LEAD FREE, SSO-24
文件頁數(shù): 18/42頁
文件大?。?/td> 858K
代理商: L8229
Obsolete
Product(s)
- Obsolete
Product(s)
L8229
L8229_0 and L8229_1 modes
8.3
W1 (PARAMETERS: Bit 2=0, Bit 1=1)
This word is mainly used to set motor related parameters.
10
DAC2 BIT 2
0
BIT2 for DAC intended to regulate the current of Bridge 2
11
DAC2 BIT 3
0
BIT3 for DAC intended to regulate the current of Bridge 2
12
DAC2 BIT 4
0
BIT4 for DAC intended to regulate the current of Bridge 2
13
DAC2 BIT 5 (MSB)
0
MSB for DAC intended to regulate the current of Bridge 2
14
PHASE 2
0
Controls the direction of current flow Bridge 2.
A logic HIGH level causes current flow from A (source) to B (sink).
15
PARALLEL OUTPUT
0
This bit must be set to 1 when otputs are paralled to drive a single DC
motor
Table 19.
W0 (continued)
BIT #
NAME
RESET
VALUE
DESCRIPTION
Table 20.
W1
BIT #
NAME
RESET
VALUE
DESCRIPTION
0
CHIP ADDRESS
0
This bit is used to select if the informations provided by bits 1 to 15 are
referred to chip 0 or chip 1. This is useful in the case that two L8229 are
present on the same board and a single nCS line is used.
1
WORD ADDRESS 1
0
This is the LSB of the two bits used to address the word.
2
WORD ADDRESS 2
0
This is the MSB of the two bits used to address the word.
3
NSLEEP
0
This bit is used to decide if the device should exit sleep mode.
4
OFF1
0
LSB for fixing the Toff time (see following Table 32).
5
OFF2
0
BIT 2 for fixing the Toff time (see following Table 32).
6
OFF3
0
BIT 3 for fixing the Toff time (see following Table 32).
7
OFF4
0
BIT 4 for fixing the Toff time (see following Table 32).
8
OFF5
0
MSB for fixing the Toff time (see following Table 32).
9
FASTDEC1
0
LSB for fixing the Fast Decay time (see followingTable 31).
10
FASTDEC2
0
BIT 2 for fixing the Fast Decay time (see following Table 31).
11
FASTDEC3
0
BIT 3 for fixing the Fast Decay time (see following Table 31).
12
FASTDEC4
0
MSB for fixing the Fast Decay time (see following Table 31).
13
SYNCRECT1
0
LSB to decide the rectification mode (see following Table 35).
14
SYNCRECT2
0
MSB to decide the rectification mode (see following Table 35).
15
Brake
0
This bit is used to put outputs in brake mode
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