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參數(shù)資料
| 型號： | L7597 |
| 廠商： | Lineage Power |
| 英文描述： | Resistive Subscriber Line Interface Circuit (SLIC), Ring Relay, and Protector (SRP) for Short Loop and TA-909 Applications(用于短環(huán)路和TA-909的電阻性用戶線接口、振鈴繼電器和保護(hù)器) |
| 中文描述： | 電阻用戶線接口電路（SLIC），環(huán)繼電器和保護(hù)（SRP）的短環(huán)路和TA - 909應(yīng)用（用于短環(huán)路和電訊- 909的電阻性用戶線接口，振鈴繼電器和保護(hù)器） |
| 文件頁數(shù)： | 25/34頁 |
| 文件大小： | 564K |
| 代理商： | L7597 |
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Lucent Technologies Inc.
25
Advance Data Sheet
March 1997
Relay, and Protector (SRP) for Short Loop and TA-909 Applications
L7597 Resistive Subscriber Line Interface Circuit (SLIC), Ring
Applications
(continued)
On-Hook Transmission
During the on-hook transmission and talk/on-hook
transmission states, the L7597 provides 10 mA dc
bias current out of the Ring current driver into PR and a
5 mA dc bias current into the Tip current driver from PT.
The switchhook detector is adjusted to compensate for
this dc bias current. The L7597 is able to support on-
hook transmission because of this bias. It is sufficiently
high to drive a 3.17 dBm signal into a 600
or 900
ac loop. In order to conserve power, this bias is
removed during the scan, active, and disconnect
states.
Parallel Data Interface
A 6-wire parallel interface (CE, CS, B0, B1, B2, and B3)
is used to pass control information from the control
logic on the line card to the L7597. The L7597 has
eight operating states. These states are selected using
three logic input bits, B0—B2, according to the truth
table shown in Table 14. Logic input B3 operates a
relay driver independent of the state of bits B0—B2.
Data on the parallel data bus, B0—B3, is loaded into a
4-bit latch on the L7597 on the low-to-high transition of
the channel select lead CS. Changes in the data at
inputs B0—B3 do not affect the L7597 while CS is
either low or high. A low on channel enable lead CE
asynchronously resets the 4-bit latch to 1111 (scan
state with the relay driver off) and disables the channel
select lead CS (i.e., CS is prevented from loading any
data into the 4-bit latch). A high on CE enables CS.
State transitions and delays between transitions are left
to the discretion of the user since, except for fault con-
ditions, the state of the L7597 depends only on the
external control provided through the logic interface.
Supervision
The L7597 offers the ring trip, loop closure, and ther-
mal shutdown functions. The status of these functions
are provided as device outputs. The outputs of the ring
trip and off-hook supervision functions are multiplexed
into a single output, NSTAT. Whether the loop closure
or ring trip detector output supervision function’s output
is seen at NSTAT is a function of the device state. The
Device State Table (Table 14) details which supervision
output (loop closure or Ring trip) is seen at NSTAT dur-
ing a given device state.
Detector values are independent of office battery and
are valid over the entire range of V
BATH
and V
BATL
. How-
ever, NSTAT must indicate an on-hook (NSTAT = 1) if
either V
BATH
or V
BATL
is disconnected (open circuit) from
its dc source and an off-hook (NSTAT = 0) if the L7597
is in thermal shutdown. V
BATH
and V
BATL
are defined as
disconnected depending on the voltage at the power
supply pins as follows (the pins of supplies which have
more than one pin are shorted together):
If V
BATH
≤
–20 V (i.e., more negative than –20 V) and
V
BATL
≤
–20 V, then NSTAT must operate normally.
If V
BATH
≥
–10 V (i.e., more positive than –10 V) or V
BATL
≥
–10 V, then NSTAT must be on-hook (NSTAT = 1).
The status of the thermal shutdown circuit is output on
B3 when CS is high (thermal shutdown = 0 V).
Off-Hook Detection
The off-hook or loop closure threshold on the L7597
SLIC is internally fixed and has a hysteresis. Off hook
is indicated (NSTAT = 0) if the loop resistance is a max-
imum 3000
. On hook is indicated (NSTAT = 1) if the
loop resistance is a minimum 5000
.
Ring Trip
The ring trip threshold is set by resistor R
10
in the resis-
tor module. With R
10
set to 600
, the circuit is guaran-
teed to ring trip up to 1330
. With a 20 Hz ringing
source, the trip time is guaranteed less than 200 ms.
The ring trip circuit assumes use of battery-backed
ringing. Pretrip immunity is such that a load across Tip
and Ring of 10 k
in parallel with a 6
μ
F capacitor will
not cause ring trip. Three external components are
required for ring trip: a 1 M
resistor from RTS to V
BF
;
resistor R
10
, which is a 600
resistor from RSW to
V
BF
; and a 0.1
μ
F capacitor from RSW to RTS. The
components required for ring trip circuit are shown
below. Note that R
10
is implemented in the resistor
module. All other components are discrete.
5-5276 (F)
Figure 9. Ring Trip Threshold
600
R
10
1 M
RTS
RSW
V
BF
0.1
μ
F
L7597
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