- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383239 > L7250 (意法半導(dǎo)體) 5V & 12V SPINDLE AND VCM MOTORS DRIVER PDF資料下載
參數(shù)資料
| 型號： | L7250 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 5V & 12V SPINDLE AND VCM MOTORS DRIVER |
| 中文描述： | 5V的 |
| 文件頁數(shù)： | 13/46頁 |
| 文件大?。?/td> | 478K |
| 代理商： | L7250 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁當(dāng)前第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
13/46
L7250
1.2 Default serial port timing Table
1.3 Inverted clock comunication modes (bit 7, Reg05H) = 1
To set the bit7, Reg05H to 1, entering this different comunication mode, a writing process using the default co-
munication protocol (see the above paragraph) must be used.
After the SEN falling edge, the internal state machine is waiting for the first SCLK rising edge. This means that
if the SCLK line starts from a low level the first rising edge, respecting the setup time Tefcr, is considered, and
is used to read the R/W bit. The internal state machine must see 16 SCLK rising edges to validate the write
operation. The write mode is started if the R/W bit is low on the first rising edge of SCLK. The read mode is
started if the R/W bit is high on the first rising edge of SCLK. The ID, Address, and Data are all then subsequent-
ly read by the L7250 on the rising edges of SCLK (See Figure 2).
The microcontroller has to read (latch) the data on the falling edge of the SCLK signal. L7250 presents the data
on the SCLK rising edge. During a read mode the last address bit is latched by the L7250 on the eighth rising
edge of SCLK. The internal state machine then turns the SDATA bit around for the L7250 to assume control at
the next SCLK falling edge (the first falling edge after the 8th SCLK rising edge).
Symbol
Parameter
Min
Max
Unit
Tcc
Serial clock period
30
ns
Tch
Serial clock high time
13
ns
Tcl
Serial clock low time
13
ns
Tcds
Serial data setup time to clock falling edge (write mode)
5
ns
Tcdh
Serial clock falling edge to serial data hold time (write mode)
4
ns
Tedh
Serial clock falling edge to serial data hold time (read mode)
5
ns
Tcdd
Serial data setup time to clock falling edge (read mode)
5
ns
Tel
Serial Enable low time
490
ns
Teh
Serial Enable high time
30
ns
Tefcf
Serial Enable falling edge to serial clock falling edge
17
ns
Tcfer
Serial clock falling edge to Serial enable rising edge
17
ns
Tdly
SDATA turn around delay time
0
ns
Note 1: All specifications with respect to 50% of signal switching thresholds
Note 2: Reading mode tested at Max 20Mhz
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| L7805ABD2T-TR | Precision 1A regulators |
| L7805ACD2T-TR | Precision 1A regulators |
| L7806ABD2T-TR | Precision 1A regulators |
| L7806ACD2T-TR | Precision 1A regulators |
| L7808ABD2T-TR | Precision 1A regulators |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| L7250E1.2 | 功能描述:電源開關(guān) IC - 配電 DSD POWER RoHS:否 制造商:Exar 輸出端數(shù)量:1 開啟電阻（最大值）:85 mOhms 開啟時間（最大值）:400 us 關(guān)閉時間（最大值）:20 us 工作電源電壓:3.2 V to 6.5 V 電源電流（最大值）: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-23-5 |
| L7252E2.6 | 功能描述:電源開關(guān) IC - 配電 DSD POWER RoHS:否 制造商:Exar 輸出端數(shù)量:1 開啟電阻（最大值）:85 mOhms 開啟時間（最大值）:400 us 關(guān)閉時間（最大值）:20 us 工作電源電壓:3.2 V to 6.5 V 電源電流（最大值）: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-23-5 |
| L725MAG | 制造商:Apex Tool Group 功能描述:TAPE, 1 IN. X 25 FT, 700 SERIES, MAGNETIC END HOOK 制造商:Lufkin 功能描述:TAPE MEASURE, MAGNETIC END HOOK 25FT 1IN; Tape Measure Type:Manual; Measuring Range Max:25ft; Blade Width:1"; Case Color:Orange; Tool Body Material:ABS; Blade Finish:Yellow Clad; Blade Length:25ft ;RoHS Compliant: NA |
| L728 | 制造商:BURNDY 功能描述:L-DIE |
| L7290 | 制造商:CIPS 功能描述:CUTTER OBLIQUE SEMI FLUSH 109MM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。