參數(shù)資料
型號(hào): L6732TR
廠商: STMICROELECTRONICS
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO16
封裝: LEAD FREE, HTSSOP-16
文件頁(yè)數(shù): 4/37頁(yè)
文件大小: 898K
代理商: L6732TR
Device description
L6732
12/37
5.3
Bypassing the LDO to avoid the voltage drop with low Vcc
If VCC 5 V the internal LDO works in dropout with an output resistance of about 1 . The
maximum LDO output current is about 100 mA and so the output voltage drop is 100 mV, to
avoid this the LDO can be by passed.
5.4
Internal and external references
It is possible to set the internal/external reference and the switching frequency by setting the
proper voltage at the EAREF pin. The maximum value of the external reference depends on
the VCC: with VCC = 4 V the clamp operates at about 2 V (typ.), while with VCC greater than
5V the maximum external reference is 2.5 V (typ.).
VEAREF from 0 % to 80 % of VCCDR -> External reference/Fsw = 250 kHz
VEAREF from 80 % to 95 % of VCCDR -> VREF = 0.6V/Fsw = 500 kHz
VEAREF from 95 % to 100 % of VCCDR -> VREF = 0.6V/Fsw = 250 kHz
Providing an external reference from 0 V to 450 mV the output voltage will be regulated but
some restrictions must be considered:
OV threshold saturates to a minimum value of 300 mV (OV is tracking the
reference; tracking small references will result in a narrow threshold reducing
noise immunity)
The under-voltage-protection doesn't work;
The PGOOD signal remains low;
To set the resistor divider it must be considered that a 100 k pull-down resistor is integrated
into the device (see Figure 5.). Finally it must be taken into account that the voltage at the
EAREF pin is captured by the device at the start-up when VCC is about 4 V.
Figure 4.
Bypassing the LDO
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