參數(shù)資料
型號(hào): L6732TR
廠商: STMICROELECTRONICS
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDSO16
封裝: LEAD FREE, HTSSOP-16
文件頁(yè)數(shù): 35/37頁(yè)
文件大?。?/td> 898K
代理商: L6732TR
L6732
Pin connection and function
7/37
3
Pin connection and function
Figure 2.
Pin connection (top view)
Table 4.
Pin functions
Pin n.
Name
Function
1
PGOOD
This pin is an open collector output and it is pulled low if the output voltage
is not within the specified thresholds (90 %-110 %). If not used it may be left
floating. Pull-up this pin to VCCDR with a 10 k resistor to obtain a logical
signal.
2
SYNCH
It is a Master-Slave pin. Two or more devices can be synchronized by
simply connecting the SYNCH pins together. The device operating with the
highest FSW will be the Master. The Slave devices will operate with 180°
phase shift from the Master. The best way to synchronize devices together
is to set their FSW at the same value. If it is not used the SYNCH pin can
be left floating.
3
SGND
All the internal references are referred to this pin.
4
FB
This pin is connected to the error amplifier inverting input. Connect it to
VOUT through the compensation network. This pin is also used to sense the
output voltage in order to manage the over voltage conditions and the
PGood signal.
5
COMP
This pin is connected to the error amplifier output and is used to
compensate the voltage control feedback loop.
6
SS/INH
The soft-start time is programmed connecting an external capacitor from
this pin and GND. The internal current generator forces a current of 10 A
through the capacitor. When the voltage at this pin is lower than 0.5 V the
device is disabled.
1
2
3
4
5
6
11
12
HTSSOP16
13
14
15
16
SGND
EAREF
FB
PGOOD
SYNCH
COMP
VCC
LGATE
PHASE
SS/INH
PGND
7
10
VCCDR
BOOT
HGATE
8
9
OCL
OCH
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