參數(shù)資料
型號(hào): L6280
廠商: STMICROELECTRONICS
元件分類(lèi): 運(yùn)動(dòng)控制電子
英文描述: STEPPER MOTOR CONTROLLER, 4.4 A, PQCC44
封裝: PLASTIC, LCC-44
文件頁(yè)數(shù): 6/26頁(yè)
文件大?。?/td> 8983K
代理商: L6280
In full bridge configuration D0 to D3 set the driv-
ing strategy of the bridge:
D0
D1
D2
D3
X
0
Tristate left and right
X
0
1
Chopper left, brake right
X
0
1
0
Chopper right, brake left
X
0
1
Brake left, brake right
X
1
0
Tristate left and right
X
1
0
1
Diagonal chopper
X
1
0
Inverted diagonal chopper
X
1
Tristate left and right
c) Dual Half Bridge Configuration
D0
D1
D2
D3
X
0
Tristate left and right
X
0
1
Brake right, chopper left
X
0
1
0
Brake right, chopper right
X
0
1
Brake left, brake right
X
1
0
Chopper left, chopper right
X
1
0
1
Tristate left, chopper right
X
1
0
Tristate right, chopper left
X
1
Tristate left and right
CHANNEL 3
For channel 3 only D0 has a meaning: it directly
drives the low side driver DMOS. When D0 = 0
the low side driver DMOS is switched OFF and
the current flows through external recirculation di-
odes.
A0 A1
1
0 When A0, A1 are in this configuration, D0
to D3 are used to set the strategy of the
output power stages according to the out-
put stage configuration previously selected.
A1 A0
1
0 When A0, A1 are in this configuration,
D0 to D2 are loaded into left or right wind-
ing D/A converter, according to D3 value
(only for channel 1 and 2)
D3
0
Left channel DAC
1
Right channel DAC
For channel 3, D0 to D2 are loaded into the
unique DAC.
A1 A0
1 1 When A0, A1 are in this configuration, the
value of D0 to D3 causes an increment or
a decrement of the content of left/right
DAC of a channel. The inc/dec operation
and the DAC register selection (right or
left) are selected according to the following
truth table:
D3
D2
D1
D0
dec LEFT
inc LEFT
dec RIGHT
inc RIGHT
The change in DAC registers is done immediately
after receiving the data.The configurations D3, D2
= 11 and D1, D0 = 11 are not allowed. (Them can
cause faulty operations) Channel 3 has only one
DAC; the change in its value is done according to
D0,D1 value.
D1
D0
dec DAC
inc DAC
D1, D0 = 11 is not allowed (they can cause faulty
operations).
Output Operation
In full bridge and dual half bridge configurations,
the output stages will operate according to D1,
D2, D3 values.
FULL BRIDGE CONFIGURATION (CH1 and
CH2)
In full bridge configuration the cennection be-
tween the output of the high side drivers and the
corresponding low side drivers has to be made
with external jumpers. The output stage diagram
here below (Fig. 13) must be substituted inside
the blank boxes in the following block diagrams.
L6280
14/26
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