
ELECTRICALCHARACTERISTICS
(T
amb
= 0 to 70
°
C; V
A
= V
power
= 12V; V
digital
= 5V, unlessotherwise
specified.Parameters market with an * areguaranteedby design, but not 100% tested in production)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
GENERAL
V
analog, Power
V
digital
I
ready12
I
sleep12
I
ready5
I
sleep5
Supply Voltage Range
Supply Voltage Range
Quiescent Current
Quiescent Current
Quiescent Current
Quiescent Current
10
4.5
12
5
13.6
5.5
15
1000
5
1000
V
V
Spindle Enabled
Spindle Disabled
Spindle Enabled
Spindle Disabled
mA
μ
A
mA
μ
A
THERMAL SHUTDOWN
*Th
Warn
*Th
Sh Dwn
Thermal Warning
Thermal Shutdown
130
155
150
175
170
195
°
C
°
C
SPINDLE DRIVER SECTION
I
o
Maximum Output Current
dv/dt on
Voltage Sew Rate
2.2
0.2
0.1*
A
Turn on
Turn off
Tj = 25
°
C,Tj = 125
°
C,
Iload = 2.0A
Tj = 25
°
C,Tj = 125
°
C,
Iload = 2.0A
2.0
1.0*
2.0
V/
μ
s
V/
μ
s
R
DS(on)
Total
Total Output On Resistance
(Sink + Source)
Sink Output On Resistance
1.0
R
DS(on)
Device
I
o (LEAK)
V
F
0.5
1.0
Output Leakage Current
Body Diode Forward Drop
1
mA
V
V
V/
μ
s
Im = 2.0A
I
m
= 100mA
R
slew
= 100K
1.5
0.9
0.35
dV
o
/dt
Output Slew Rate
0.30
* Yet to be confirmed
DAC ACCELERATIONCONTROL / SENSEAMPLIFIER
RES
Resolution
NL
Differential Non-linearity
INL
Integral Non- linearity
FS
Full Scale Accuracy
CT
Conversion Time
FSCT
Full Scale Temp Coefficient
Gain
Curr. Sense GainRatio 4:1or 20:1
DAC
out
DAC Output
OFFSET
Input Offset of Sense Amp
Full scale
0-1 bit excluded
8
bits
LSB
LSB
%
μ
s
ppm/
°
C
%
V
mV
0.5
1.5
5
10
250
TBD
2
15
0 to 125
°
C
1% resistence tolerance (0.5
)
0
0
7
LOGIC SECTION (All digital inputsare CMOS compatible)
V
ih
High Level Input Voltage
V
il
Low Level Input Voltage
V
oh
High Level Output Voltage
V
ol
Low Level Output Voltage
I
in
Input Leakage Current
I
wsi
Minimum Sequence Increment
High Time
F
sys
System Clock Frequency
3.5
V
V
V
V
1.5
I
out
= 1.0mA
I
out
= 1.0mA
Tj = 125
°
C,1
4.5
0.4
1
-1
mA
Note 1
10.0
MHz
L6239
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