參數(shù)資料
型號: L5962
廠商: STMICROELECTRONICS
元件分類: 穩(wěn)壓器
英文描述: SWITCHING REGULATOR, PDSO36
封裝: ROHS COMPLAINT, SOP-36
文件頁數(shù): 10/24頁
文件大?。?/td> 242K
代理商: L5962
Operating mode
L5962
Doc ID 16819 Rev 2
5
Operating mode
When a power source is connected to the IC, the internal circuitry begins to establish
internal bias, the bandgap reference voltage, and other related functions. The standby
(VSTBY) regulator and battery detection are functional.
The standby mode is activated when the enable (EN) input is asserted low.
When the enable (EN) input is set high (EN =1: active mode.), the IC exits the standby mode
and enters the active mode.
During active mode, I2C interface is activated and all functions are operational. The IC
remains in active mode until either the standby regulator falls out of regulation (where the IC
enters the low-voltage reset state) or until the enable (EN) input is brought back to 0 V
(where the IC enters the standby state).
5.1
Battery detection
The operating voltage for VLR1, high side drivers and battery warnings is provided by VBAT
pin. This input is also used as reference to detect an over-voltage or an under-voltage
condition. When such condition is detected, the VBATVW output is pulled down. The
overvoltage detection circuit has hysteresis for noise rejection.
Two external resistors (Rext1, Rext2), whose values are lower than 100 kohm, are
connected to the LWIN (low warning input) pin to give the possibility to trim the threshold at
which the low voltage warning comparator triggers. When LVWIN voltage is below the input
voltage threshold (1.25 V typ), the VBATW (battery voltage warning) output is pulled down
and a low-voltage warning is indicated. When no external resistor network is connected to
LVWIN, the detector sets the threshold to a nominal 7.5 V.
No external interaction is required to reset the output state, because it is automatically reset
when the fault condition is removed.
Figure 4 shows an high level block diagram of the low-voltage warning circuit. VBAT is
divided by two internal resistors (Rint1, Rint2) and two external programming resistors
(Rext1, Rext2). When VBAT decreases so that LVWIN voltage gets lower than the internal
reference (VBG), VBATW is pulled down to ground.
Figure 4.
Low voltage warning high level block diagram
VBAT
Rint1 =13.89 M ohm
Rint2 = 2.83 M ohm
Rext1
Rext2
VBATW
VBG
LVWIN
comparator
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