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參數(shù)資料
| 型號(hào)： | L3916A |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類(lèi)： | LED驅(qū)動(dòng)器 |
| 英文描述： | SPEECH AND 14 MEMORY DIALER WITH LED DRIVER |
| 中文描述： | 言論和14記憶體，LED驅(qū)動(dòng)撥號(hào)器 |
| 文件頁(yè)數(shù)： | 8/14頁(yè) |
| 文件大?。?/td> | 124K |
| 代理商： | L3916A |
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ELECTRICALCHARACTERISTICS
(continued)
Symbol
G
DTMF
C
DTMF
Parameter
Test Condition
I
L
= 15mA,R
DTMF
= 2.25K
Min.
38
–34
Typ.
40
–32
Max.
42
–30
Unit
dB
dB
Fig.
7
7
DTMF Gain
Confidence Tone Level
V
ear
/V
LN
DTMF Level on the line
High Frequency Group
Low Frequency Group
Pre-emphasis
DTMF Output Distortion
DTMF Att. pin Impedance
Receive Gain
V
DTMF
R
DTMF
= 2.25K
,
C
DTMF
= 22nF
–8
–10
1.0
–6
–8
2
5
32
–4
–6
3
8
dBm
dBm
dB
%
K
7
P
EI
DIS
Z
DTMF
G
RX
7
7
V
inp
= 5mVrms, R
e
= 300
R
GRX
= 100K
I
L
= 15mA
I
L
= 60mA
I
L
=15mA, R
e
= 300
R
GRX
= 10K
R
GRX
= 300K
I
L
= 15mA; R
GRX
= 100K
Re = 150
,
V
C
= 0.25V
rms
R
e
= 300
,
V
C
= 0.45V
rms
R
e
= 450
,
I
L
= 15mA R
L
= 300
R
GRX
= 100K
V
inp
= 0V
I
L
= 15mA
I
L
= 15mA; R
p
=
∞
R
p
= 430K
29.5
24
–20
31.0
26
32.5
28
+10
dB
dB
dB
dB
dB
8
A
GRX
Receive GainVariation
–20
+10
8
D
RX
Reveive Distortion
V
C
= 0.55V
rms
2
2
2
%
%
%
μ
V
8
N
RX
Receive Noise
200
8
Z
OUT
V
PT
Receive Output Impedance
Pacifier Tone Level on
Earphone
KEYBOARD INTERFACE
TKD
FKS
KRU
KRD
Keypad Pulldown Resistance
PULSE MODE
TPT
FPT
PR
TB
TM
IDP
PDP
Predigit Pause
TONE MODE
TRIS
TR
TPSD
TISD
TDUR
Tone Output Duration
t
HFP
Hook Flash Timing
35
60
600
8
8
mVrms
mVrms
Keypad Debounce Time
Keypad Scan Frequency
Keypad Pullup Resistance
32
250
100
500
ms
Hz
K
Pacifier Tone Duration
Pacifier Tone Frequency
Pulse Rate
Break Time
Make Time
Inter Digit Pause
75
500
10
60
40
820
50
ms
Hz
PPS
ms
ms
ms
ms
Tone Output Rise Time
Tone Signalling Rate
Pre Signal Delay
Inter Signal Delay
40
5
100
100
585
5
ms
1/s
ms
ms
ms
ms
Notes:
1. All inputsunloaded. Quiescent mode (oscillatoroff).
2. Pulse outputsink current forV
OUT
= 0.5V.
3. Pacifiertone sink current for V
OUT
= 0.5V.Source current for V
OUT
= 2.5V.
4. Memory retentionvoltage is the point where memory is guaranteed but circuit operation is not. Proper memory retention is guaranteedif
either the minimum IMR is provided or the minimum VMR. The design does not have to provide both the minimum current and voltage
simultaneously.
L3916A
8/14
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