參數(shù)資料
型號： KSZ8995XA
廠商： Micrel Inc
文件頁數(shù)： 30/51頁
文件大?。?/td> 0K
描述： IC SWITCH 10/100 5PORT 128PQFP
標(biāo)準(zhǔn)包裝： 66
系列： *
類型： *
應(yīng)用： *
安裝類型： 表面貼裝
封裝/外殼： 128-BFQFP
供應(yīng)商設(shè)備封裝： 128-PQFP（14x20）
包裝： 托盤
產(chǎn)品目錄頁面： 1081 (CN2011-ZH PDF)
配用： 576-1642-ND - BOARD EVALUATION FOR KSZ8995XA
其它名稱： 576-1042
KS8995XA
Micrel, Inc.
M9999-051305
36
May 2005
Register 23 (0x17): Port 1 Control 7
Register 39 (0x27): Port 2 Control 7
Register 55 (0x37): Port 3 Control 7
Register 71 (0x47): Port 4 Control 7
Register 87 (0x57): Port 5 Control 7
Address
Name
Description
Mode
Default
7-4
Transmit low priority
This along with port control 6, bits [7:0] form a 12-bit
R/W
0
rate control [11:8]
field to determine how many “32Kbps” low priority
blocks can be transmitted (in a unit of 4K bytes in a
one second period).
3-0
Transmit high priority
This along with port control 5, bits [7:0] form a 12-bit
R/W
0
rate control [11:8]
field to determine how many “32Kbps” high priority
blocks can be transmitted (in unit of 4K bytes in a
one second period).
Register 24 (0x18): Port 1 Control 8
Register 40 (0x28): Port 2 Control 8
Register 56 (0x38): Port 3 Control 8
Register 72 (0x48): Port 4 Control 8
Register 88 (0x58): Port 5 Control 8
Address
Name
Description
Mode
Default
7-0
Receive high priority
This along with port control 10, bits [3:0] form a 12-bit
R/W
0
rate control [7:0]
field to determine how many “32Kbps” high priority
blocks can be received (in a unit of 4K bytes in a one
second period).
Register 25 (0x19): Port 1 Control 9
Register 41 (0x29): Port 2 Control 9
Register 57 (0x39): Port 3 Control 9
Register 73 (0x49): Port 4 Control 9
Register 89 (0x59): Port 5 Control 9
Address
Name
Description
Mode
Default
7-0
Receive low priority
This along with port control 10, bits [7:4] form a 12-bit
R/W
0
rate control [7:0]
field to determine how many “32Kbps” low priority
blocks can be received (in a unit of 4K bytes in a one
second period).
Register 26 (0x1A): Port 1 Control 10
Register 42 (0x2A): Port 2 Control 10
Register 58 (0x3A): Port 3 Control 10
Register 74 (0x4A): Port 4 Control 10
Register 90 (0x5A): Port 5 Control 10
Address
Name
Description
Mode
Default
7-4
Receive low priority
This along with port control 9, bits [7:0] form a 12-bit
R/W
0
rate control [11:8]
field to determine how many “32Kbps” low priority
blocks can be received (in a unit of 4K bytes in a one
second period).
3-0
Receive high priority
This along with port control 8, bits [7:0] form a 12-bit
R/W
0
rate control [11:8]
field to determine how many “32Kbps” high priority
blocks can be received (in a unit of 4K bytes in a one
second period).
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