參數(shù)資料
型號： KSZ8995XA
廠商： Micrel Inc
文件頁數(shù)： 26/51頁
文件大?。?/td> 0K
描述： IC SWITCH 10/100 5PORT 128PQFP
標(biāo)準(zhǔn)包裝： 66
系列： *
類型： *
應(yīng)用： *
安裝類型： 表面貼裝
封裝/外殼： 128-BFQFP
供應(yīng)商設(shè)備封裝： 128-PQFP（14x20）
包裝： 托盤
產(chǎn)品目錄頁面： 1081 (CN2011-ZH PDF)
配用： 576-1642-ND - BOARD EVALUATION FOR KSZ8995XA
其它名稱： 576-1042
KS8995XA
Micrel, Inc.
M9999-051305
32
May 2005
Address
Name
Description
Mode
Default
Register 5 (0x05): Global Control 3 (continued)
1
Reserved
R/W
0
Sniff mode select
1 = will do Rx AND Tx sniff (both source port and
R/W
0
destination port need to match).
0 = will do Rx OR Tx sniff (either source port or
destination port needs to match). This is the mode
used to implement Rx only sniff.
Register 6 (0x06): Global Control 4
7
Switch MII back
1 = enable half-duplex back pressure on switch MII
R/W
0
pressure enable
interface.
0 = disable back pressure on switch MII interface.
6
Switch MII half
1 = enable MII interface half-duplex mode.
R/W
Pin SMRXD2 strap
duplex mode
0 = enable MII interface full-duplex mode.
option. Pull-down (0):
Full-duplex mode.
Pull-up (1): Half-
duplex mode.
Note: SMRXD2
has internal pull-
down.
5
Switch MII flow
1 = enable full-duplex flow control on switch MII interface.
R/W
Pin SMRXD3 strap
control enable
0 = disable full-duplex flow control on switch MII interface.
option. Pull-down
(0): disable flow
control. Pull-up (1):
enable flow control
Note: SMRXD3
has internal pull-
down.
4
Switch MII 10BT
1 = the switch interface is in 10Mbps mode.
R/W
Pin SMRXD1 strap
0 = the switch interface is in 100Mbps mode.
option. Pull-down (0):
Enable 100Mbps
Pull-up (1): Enable
10Mpbs.
Note: SMRXD1 has
internal pull-down.
3
Null VID replacement
1 = will replace null VID with port VID (12 bits).
R/W
0
0 = no replacement for null VID.
2-0
Broadcast storm
This along with the next register determines how many
R/W
000
protection rate bit [10:8]
“64 byte blocks” of packet data allowed on an input
port in a preset period. The period is 50ms for 100BT
or 500ms for 10BT. The default is 1%.
Register 7 (0x07): Global Control 5
7-0
Broadcast storm
This along with the previous register determines how
R/W
0x4A(1)
protection rate bit [7:0]
many “64 byte blocks” of packet data are allowed on
an input port in a preset period. The period is 50ms
for 100BT or 500ms for 10BT. The default is 1%.
Note:
1. 148,800 frames/sec × 50ms/interval × 1% = 74 frames/interval (approx.) = 0x4A.
Register 8 (0x08): Global Control 6
7-0
Factory testing
Reserved
R/W
0x24
Register 9 (0x09): Global Control 7
7-0
Factory testing
Reserved
R/W
0x24
Register 10 (0x0A): Global Control 8
7-0
Factory testing
Reserved
R/W
0x24
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