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參數(shù)資料
| 型號(hào)： | KSZ8051MLL TR |
| 廠商： | Micrel Inc |
| 文件頁(yè)數(shù)： | 48/48頁(yè) |
| 文件大小： | 0K |
| 描述： | TXRX PHY 10/T100 3.3V MII 48LQFP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | PHY 收發(fā)器 |
| 驅(qū)動(dòng)器/接收器數(shù)： | 1/1 |
| 規(guī)程： | MII |
| 電源電壓： | 1.8V，2.5V，3.3V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 帶卷 (TR) |
| 配用： | 576-3864-ND - BOARD EVALUATION FOR KSZ8051MLL |
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Micrel, Inc.
KSZ8051MLL
July 2010
9
M9999-071210-1.0
Pin Description – KSZ8051MLL
Pin Number
Pin Name
Type
(1)
Pin Function
1
GND
Gnd
Ground
2
GND
Gnd
Ground
3
GND
Gnd
Ground
4
VDD_1.2
P
1.2V core VDD
(power supplied by KSZ8051MLL)
Decouple with 2.2uF and 0.1uF capacitors to ground, and join with pin 31 by power
trace or plane.
5
NC
-
No connect
6
NC
-
No connect
7
VDDA_3.3
P
3.3V analog VDD
8
NC
-
No connect
9
RXM
I/O
Physical receive or transmit signal (- differential)
10
RXP
I/O
Physical receive or transmit signal (+ differential)
11
TXM
I/O
Physical transmit or receive signal (- differential)
12
TXP
I/O
Physical transmit or receive signal (+ differential)
13
GND
Gnd
Ground
14
XO
O
Crystal feedback – for 25 MHz crystal
This pin is a no connect if oscillator or external clock source is used.
15
XI
I
Crystal / Oscillator / External Clock Input
25MHz +/-50ppm
16
REXT
I
Set PHY transmit output current
Connect a 6.49K
Ω resistor to ground on this pin.
17
GND
Gnd
Ground
18
MDIO
I/O
Management Interface (MII) Data I/O
This pin has a weak pull-up, is open-drain like, and requires an external 1.0K
Ω
pull-up resistor.
19
MDC
I
Management Interface (MII) Clock Input
This clock pin is synchronous to the MDIO data pin.
20
RXD3 /
PHYAD0
Ipu/O
MII Mode:
MII Receive Data Output[3]
(2)
/
Config Mode:
The pull-up/pull-down value is latched as PHYADDR[0] at the
de-assertion of reset. See Strapping Options section for details.
21
RXD2 /
PHYAD1
Ipd/O
MII Mode:
MII Receive Data Output[2]
(2)
/
Config Mode:
The pull-up/pull-down value is latched as PHYADDR[1] at the
de-assertion of reset. See Strapping Options section for details.
22
RXD1 /
PHYAD2
Ipd/O
MII Mode:
MII Receive Data Output[1]
(2)
/
Config Mode:
The pull-up/pull-down value is latched as PHYADDR[2] at the
de-assertion of reset. See Strapping Options section for details.
23
RXD0 /
DUPLEX
Ipu/O
MII Mode:
MII Receive Data Output[0]
(2)
/
Config Mode:
The pull-up/pull-down value is latched as DUPLEX at the
de-assertion of reset. See Strapping Options section for details.
24
GND
Gnd
Ground
25
VDDIO
P
3.3V, 2.5V or 1.8V digital VDD
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| KSZ8051MNL | 功能描述:TXRX PHY 10/T100 3.3V MII 32-QFN RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,140 系列:AU 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):1/1 規(guī)程:CAN 電源電壓:5.3 V ~ 27 V 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SO 包裝:管件 其它名稱:935267940512AU5790D14AU5790D14-ND |
| KSZ8051MNL TR | 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver w/ MII Support (32-QFN) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8051MNL-EVAL | 功能描述:以太網(wǎng)開(kāi)發(fā)工具 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver w/ MII Support (32-QFN) - Evaluation Board RoHS:否 制造商:Micrel 產(chǎn)品:Evaluation Boards 類型:Ethernet Transceivers 工具用于評(píng)估:KSZ8873RLL 接口類型:RMII 工作電源電壓: |
| KSZ8051MNLI | 功能描述:TXRX PHY 10/T100 3.3V 32QFN RoHS:是 類別:集成電路 (IC) >> 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器 系列:- 標(biāo)準(zhǔn)包裝:1,140 系列:AU 類型:收發(fā)器 驅(qū)動(dòng)器/接收器數(shù):1/1 規(guī)程:CAN 電源電壓:5.3 V ~ 27 V 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SO 包裝:管件 其它名稱:935267940512AU5790D14AU5790D14-ND |
| KSZ8051MNLI TR | 功能描述:以太網(wǎng) IC 3.3V, 10Base-T/100Base-TX Physical Layer Transceiver with MII support (32-QFN, Industrial Grade) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
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