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參數(shù)資料
型號(hào): KSZ8041NLJ TR
廠商: Micrel Inc
文件頁(yè)數(shù): 26/43頁(yè)
文件大?。?/td> 0K
描述: TXRX PHY 10/100 3.3V 32MLF
標(biāo)準(zhǔn)包裝: 1
類型: 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: MII,RMII
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 32-VFQFN 裸露焊盤,32-MLF?
供應(yīng)商設(shè)備封裝: 32-MLF?(5x5)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: 576-3625-6
MCP47DA1
DS25118C-page 32
2012 Microchip Technology Inc.
4.1
POR/BOR Operation
The Power-on Reset is the case where the device is
having power applied to it from VSS. The Brown-out
Reset occurs when a device had power applied to it,
and that power (voltage) drops below the specified
range.
The device’s RAM retention voltage (VRAM) is lower
than the POR/BOR voltage trip point (VPOR/VBOR).
This ensures that when the device power on reset
occurs, the logic can retain the default values that are
loaded. The maximum VPOR/VBOR voltage is less than
1.8V. When VPOR/VBOR < VDD < 2.7V, the DACs’ elec-
trical performance may not meet the data sheet
specifications.
Table 4-2 shows the DAC’s level of functionality across
the entire VDD range, while Figure 4-2 illustrates the
Power-up and Brown-out functionality.
4.1.1
POWER-ON RESET
When the device powers up, the device VDD will cross
the VPOR/VBOR voltage. Once the VDD voltage crosses
the VPOR/VBOR voltage, the following happens:
Volatile Serial Shift Register / Wiper register is
loaded with the default values (see Table 4-1)
The device is capable of digital operation
TABLE 4-1:
DEFAULT POR WIPER
SETTING SELECTION
4.1.2
BROWN-OUT RESET
When the device powers down, the device VDD will
cross the VPOR/VBOR voltage (VBOR < 1.8V). Once the
VDD voltage decreases below the VPOR/VBOR voltage,
the following happens:
Serial Interface is disabled
If the VDD voltage decreases below the VRAM voltage,
the following happens:
Volatile Serial Shift Register (SSR) and Wiper
register may become corrupted
As the voltage recovers above the VPOR/VBOR voltage,
Serial commands not completed due to a brown-out
condition may cause the memory location to become
corrupted.
4.1.3
WIPER REGISTER (RAM)
The Wiper Register is 7-bit volatile memory that starts
functioning at the RAM retention voltage (VRAM). The
Wiper Register will be loaded with the default wiper
value when VDD rises above the VPOR/VBOR voltage.
4.1.4
DEVICE CURRENTS
The current of the device can be classified into two
modes of the device operation. These are:
Serial Interface Inactive (Static Operation)
Serial Interface Active
Static Operation occurs when a Stop condition is
received. Static Operation is exited when a Start
condition is received.
TABLE 4-2:
DEVICE FUNCTIONALITY AT EACH VDD REGION (Note 1)
Note:
At voltages below VDD(MIN), the electrical
performance of the I2C interface may not
meet the data sheet specifications
Default POR
Wiper Setting
Serial Shift
Register (SSR)
Wiper Register
Mid-scale
40h
20h
VDD Level
Serial
Interface
VOUT
DAC Register Setting
Comment
VDD < VTH
Ignored
Unknown
VTH < VDD < VBOR Ignored
Pulled Low
Unknown
VBOR VDD < 1.8V Unknown
Operational with reduced
electrical specifications
DAC Register loaded with
POR/BOR value
1.8V
V
DD < 2.7V
Accepted
Operational with reduced
electrical specifications
DAC Register determines
Serial Value
Electrical performance may
not meet the data sheet
specifications.
2.7V
V
DD 5.5V
Accepted
Operational
DAC Register determines
Serial Value
Meets the data sheet
specifications
Note 1: For system voltages below the minimum operating voltage, it is recommended to use a voltage supervisor
to hold the system in reset. This will ensure that MCP47x1 commands are not attempted out of the oper-
ating range of the device.
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