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參數(shù)資料
| 型號： | KSC7333 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Digital Image Stabilization and Digital Zoom Processor |
| 中文描述： | 數(shù)字圖像穩(wěn)定和數(shù)碼變焦處理器 |
| 文件頁數(shù)： | 16/44頁 |
| 文件大?。?/td> | 284K |
| 代理商： | KSC7333 |
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KS7333
DATA SHEET
16
FUNCTIONS OF EACH BLOCK
SCLK
SMI
SCSN
SMO
High-Z
Data1
Data3
Address1
Data1
Data2
Data3
Data2
PICTURE
SCLK:
System micom's main clock, whose cycle corresponds to the timing diagram.
SMI:
Input through triggering at the SCLK's negative edge and valid only when SCSN is low. The first bit can
be either "H' (Read Mode) or "L" (Read/Write mode) and the next 7 bits specify the address of the
register to be controlled. Starting from the start address, the address reduces by one every time an 8bit
data arrives.
Data is valid only when it becomes an 8bit data. However, if SCSN becomes high before an 8 bit data is
sent, that data becomes invalid.
SCSN:
Data enable signal which is low active.
SMO:
Output through triggering at the SCLK's negative edge and valid only when SCSN is low.
VD
HD
Write Enable
Read Enable
VCNT = 4
ODM Data Latched
VCNT = 16
Motion Data Latched
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