KS8695PX Micrel Pin Description Signal List Alphabetized by Name Pin Number Pin Name Type" />
參數(shù)資料
型號(hào)： KS8695PX-EVAL
廠商： Micrel Inc
文件頁數(shù)： 37/40頁
文件大?。?/td> 0K
描述： BOARD EVAL EXPERIMENT KS8695PX
標(biāo)準(zhǔn)包裝： 1
相關(guān)產(chǎn)品： KS8695PXA3-ND - IC ARM9 W/MMU 5PORT 289-PBGA
KS8695PX-ND - IC SWITCH 10/100 1PORT 289PBGA
其它名稱： 576-1004
M9999-091605
6
September 2005
KS8695PX
Micrel
Pin Description
Signal List Alphabetized by Name
Pin Number
Pin Name
Type(1)
Pin Function
U4
ADDR0
O
Address Bit.
T4
ADDR1
O
Address Bit.
R3
ADDR10
O
Address Bit.
P1
ADDR11
O
Address Bit.
P2
ADDR12
O
Address Bit.
N1
ADDR13
O
Address Bit.
N2
ADDR14
O
Address Bit.
N3
ADDR15
O
Address Bit.
N4
ADDR16
O
Address Bit.
M1
ADDR17
O
Address Bit.
M2
ADDR18
O
Address Bit.
M3
ADDR19
O
Address Bit.
U3
ADDR2
O
Address Bit
P3
ADDR20/BA0
O
Address Bit/Bank Address Bit 0 for SDRAM Interface.
P4
ADDR2/BA1
O
Address Bit/Bank Address Bit 1 for SDRAM Interface.
T3
ADDR3
O
Address Bit.
U2
ADDR4
O
Address Bit.
U1
ADDR5
O
Address Bit.
T1
ADDR6
O
Address Bit.
T2
ADDR7
O
Address Bit.
R1
ADDR8
O
Address Bit.
R2
ADDR9
O
Address Bit.
E3
AGND
Gnd
Analog Signal Ground.
H7
AGND
Gnd
Analog Signal Ground.
J7
AGND
Gnd
Analog Signal Ground.
K7
AGND
Gnd
Analog Signal Ground.
L7
AGND
Gnd
Analog Signal Ground.
D14
CBEN0
I/O
PCI Commands and Byte Enable 0. Active Low.
A11
CBEN1
I/O
PCI Commands and Byte Enable 1. Active Low.
B9
CBEN2
I/O
PCI Commands and Byte Enable 2. Active Low.
A6
CBEN3
I/O
PCI Commands and Byte Enable 3. Active Low.
B10
CLKRUNN
I/O
Cardbus Clock Run Request Signal. Active Low.
U15
DATA0
I/O
External Data Bit.
T15
DATA1
I/O
External Data Bit.
U12
DATA10
I/O
External Data Bit.
T12
DATA11
I/O
External Data Bit.
Note:
1. Gnd = Ground.
O = Output.
I/O = Bidirectional.
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