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參數(shù)資料
| 型號(hào)： | KMM377S3227BT |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 32Mx72 SDRAM DIMM(32M x 72 動(dòng)態(tài) RAM模塊) |
| 中文描述： | 32Mx72 SDRAM的內(nèi)存（32M × 72配置動(dòng)態(tài)內(nèi)存模塊） |
| 文件頁(yè)數(shù)： | 1/12頁(yè) |
| 文件大?。?/td> | 202K |
| 代理商： | KMM377S3227BT |
REV. 3 Mar. '98
Preliminary
KMM377S3227BT
SDRAM MODULE
Revision History
Revision .2 (Jan. 1998)
DC Characteristics values are changed.
: I
CC2
N & I
CC3
N
STANDARD TIMING DIAGRAM is changed .
All AC parameters are measured by module tap reference(refer to page#5)
CAS Latency is based on Reg. DIMM (In case of Unbuff. DIMM CAS Latency is 1 CLK earlier than this)
Revision .3 (Mar. 1998)
Some Parameter values & Characteristics of comp. level are changed as below.
- I
CC3
PS is changed 1mA to 2mA.
- Input leakage currents (Inputs) :
±
5uA to
±
1uA.
Input leakage currents (I/O) :
±
5uA to
±
1.5uA.
- Cin to be measured at V
DD
= 3.3V, T
A
= 23
°
C, f = 1MHz, V
REF
= 1.4V
±
200mA.
- AC Operating Conditions is changed as defined :
V
IH
(max) = 5.6V AC. The overshoot voltage duration is
≤
3ns.
V
IL
(min) = -2.0V AC. The undershoot voltage duration is
≤
3ns.
SPD data is separated.
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