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參數(shù)資料
| 型號： | KMM374S3323T |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 32Mx72 SDRAM DIMM(32M x 72 動態(tài) RAM模塊) |
| 中文描述： | 32Mx72 SDRAM的內(nèi)存（32M × 72配置動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 6/13頁 |
| 文件大?。?/td> | 152K |
| 代理商： | KMM374S3323T |
PC100 SDRAM MODULE
KMM374S3323T
REV. 0 Aug. 1998
1. Measured with outputs open.
2. Refresh period is 64ms.
Notes :
DC CHARACTERISTICS
(Recommended operating condition unless otherwise noted, T
A
= 0 to 70
°
C)
Parameter
Symbol
Test Condition
CAS
Latency
Version
Unit
Note
-8
-H
-L
Operating current
(One bank active)
I
CC1
Burst length = 1
t
RC
≥
t
RC
(min)
I
OL
= 0 mA
1,350
1,260
1,260
mA
1
Precharge standby current in
power-down mode
I
CC2
P
CKE
≤
V
IL
(max), t
CC
= 15ns
18
mA
I
CC2
PS
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
18
Precharge standby current in
non power-down mode
I
CC2
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 15ns
Input signals are changed one time during 30ns
270
mA
I
CC2
NS
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
126
Active standby current in
power-down mode
I
CC3
P
CKE
≤
V
IL
(max), t
CC
= 15ns
90
mA
I
CC3
PS
CKE & CLK
≤
V
IL
(max), t
CC
=
∞
90
Active standby current in
non power-down mode
(One bank active)
I
CC3
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 15ns
Input signals are changed one time during 30ns
540
mA
I
CC3
NS
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
360
mA
Operating current
(Burst mode)
I
CC4
I
OL
= 0 mA
Page burst
2Banks activated
t
CCD
= 2CLKs
3
1,620
1,390
1,390
mA
1
2
1,300
1,390
1,300
Refresh current
I
CC5
t
RC
≥
t
RC
(min)
3,600
mA
2
Self refresh current
I
CC6
CKE
≤
0.2V
27
mA
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