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參數(shù)資料
| 型號： | KMM332V204BT-L |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 2M x 32 DRAM SODIMM(2M x 32 動態(tài) RAM模塊) |
| 中文描述： | 200萬× 32內(nèi)存的SODIMM（2米× 32動態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 5/15頁 |
| 文件大?。?/td> | 232K |
| 代理商： | KMM332V204BT-L |
DRAM MODULE
KMM332V204BT-L
KMM332V224BT-L
NOTES
An initial pause of 200us is required after power-up followed by
any 8 RAS-only or CAS-before-RAS refresh cycles before
proper device operation is achieved.
VIH(min) and VIL(max) are reference levels for measuring tim-
ing of input signals. Transition times are measured between
VIH(min) and VIL(max) and are assumed to be 5ns for all
inputs.
Measured with a load equivalent to 1 TTL loads and 100pF,
Voh=2.0V and Vol=0.8V
Operation within the
t
RCD
(max) limit insures that
t
RAC
(max) can
be met.
t
RCD
(max) is specified as a reference point only. If
t
RCD
is greater than the specified
t
RCD
(max) limit, then access time
is controlled exclusively by
t
CAC
.
Assumes that
t
RCD
≥
t
RCD
(max).
This parameter defines the time at which the output achieves
the open circuit condition and is not referenced to V
OH
or V
OL
.
t
WCS
is non restrictive operating parameter.
It included in the data sheet as electrical characteristic only.
If
t
WCS
≥
t
WCS
(min) the cycle is an early write cycle and the
data out pin will remain high impedance for the duration of
the cycle.
Either
t
RCH
or
t
RRH
must be satisfied for a read cycle.
These parameter are referenced to the CAS leading edge in
early write cycles.
Operation within the
t
RAD
(max) limit insures that
t
RAD
(max)
can be met.
t
RAD
(max) is specified as reference point only. If
t
RAD
is greater than the specified
t
RAD
(max) limit, then
access time is controlled by t
AA
.
4096/1024 cycle of Burst Refresh must be executed within
16ms before and after self refresh, in order to meet refresh
specification.
Test condition : Vih/Vil=2.2V/0.7V, Voh/Vil=2.0V/0.8V, Output loading CL=100uF)
Parameter
Symbol
-5
-6
Unit
Note
Min
35
10
50
100
90
-50
Max
Min
40
10
60
100
110
-50
Max
Fast page mode cycle time
CAS precharge time(Hyper page cycle)
RAS pulse width(Hyper page cycle)
RAS pulse width(C-B-R self refresh)
RAS precharge time(C-B-R self refresh)
CAS hold time(C-B-R self refresh)
t
PC
t
CP
t
RASP
t
RASS
t
RPS
t
CHS
ns
ns
ns
us
ns
ns
200K
200K
11
11
11
AC CHARACTERISTICS
(0
°
C
≤
T
A
≤
70
°
C, V
CC
=3.3V
±
0.3V, See notes 1,2.)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
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