參數(shù)資料
型號(hào)： KMC755CVT400LE
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 35/56頁(yè)
文件大小： 0K
描述： IC MPU 32BIT 400MHZ 360-FCPBGA
標(biāo)準(zhǔn)包裝： 1
系列： MPC7xx
處理器類型： 32-位 MPC7xx PowerPC
速度： 400MHz
電壓： 2V
安裝類型： 表面貼裝
封裝/外殼： 360-BBGA，F(xiàn)CCBGA
供應(yīng)商設(shè)備封裝： 360-FCCBGA（25x25）
包裝： 托盤
MPC755 RISC Microprocessor Hardware Specifications, Rev. 8
40
Freescale Semiconductor
System Design Information
Figure 22 describes the driver impedance measurement circuit described above.
Figure 22. Driver Impedance Measurement Circuit
Alternately, the following is another method to determine the output impedance of the MPC755. A voltage
source, Vforce, is connected to the output of the MPC755 as shown in Figure 23. Data is held low, the
voltage source is set to a value that is equal to (L2)OVDD/2 and the current sourced by Vforce is measured.
The voltage drop across the pull-down device, which is equal to (L2)OVDD/2, is divided by the measured
current to determine the output impedance of the pull-down device, RN. Similarly, the impedance of the
pull-up device is determined by dividing the voltage drop of the pull-up, (L2)OVDD/2, by the current sank
by the pull-up when the data is high and Vforce is equal to (L2)OVDD/2. This method can be employed with
either empirical data from a test setup or with data from simulation models, such as IBIS.
RP and RN are designed to be close to each other in value. Then Z0 = (RP + RN)/2.
Figure 23 describes the alternate driver impedance measurement circuit.
Figure 23. Alternate Driver Impedance Measurement Circuit
(L2)OVDD
OGND
RP
RN
Pad
Data
SW1
SW2
(L2)OVDD
BGA
Data
Pin
Vforce
OGND
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