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參數(shù)資料
| 型號(hào)： | KMC68MH360ZQ25VL |
| 廠商： | Freescale Semiconductor |
| 文件頁(yè)數(shù)： | 8/14頁(yè) |
| 文件大小： | 0K |
| 描述： | IC MPU QUICC 25MHZ 357-PBGA |
| 標(biāo)準(zhǔn)包裝： | 2 |
| 系列： | M683xx |
| 處理器類型： | M683xx 32-位 |
| 速度： | 25MHz |
| 電壓： | 5V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 357-BBGA |
| 供應(yīng)商設(shè)備封裝： | 357-PBGA（25x25） |
| 包裝： | 托盤 |
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Four SCCs
— Ethernet/IEEE 802.3 Optional on SCC1 (Full 10-Mbps Support) (Available only on the
MC68EN360)
— HDLC/SDLC
(All Four Channels Supported at 2 Mbps)
— HDLC Bus (Implements an HDLC-Based Local Area Network (LAN))
— AppleTalk
— Signaling System #7
— Universal Asynchronous Receiver Transmitter (UART)
— Synchronous UART
— Binary Synchronous Communication (BISYNC)
— Totally Transparent (Bit Streams)
— Totally Transparent (Frame Based with Optional Cyclic Redundancy Check (CRC))
— Profibus (RAM Microcode Option)
— Asynchronous HDLC (RAM Microcode Option) to Support PPP (Point to Point Protocol)
— DDCMP
(RAM Microcode Option)
— V.14 (RAM Microcode Option)
— X.21 (RAM Microcode Option)
Two SMCs
— UART
— Transparent
— General Circuit Interface (GCI) Controller
— Can Be Connected to the Time-Division Multiplexed (TDM) Channels
One SPI
— Superset of the MC68302 SCP
— Supports Master and Slave Modes
— Supports Multimaster Operation on the Same Bus
Time-Slot Assigner
Supports Two TDM Channels
— Each TDM Channel Can Be T1, CEPT, PCM Highway, ISDN Basic Rate,
ISDN Primary Rate, User Defined
— 1- or 8-Bit Resolution
— Allows Independent Transmit and Receive Routing, Frame Syncs, Clocking
— Allows Dynamic Changes
— Can Be internally Connected to Six Serial Channels (Four SCCs and
Two SMCs)
Parallel Interface Port
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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