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參數(shù)資料
| 型號： | KM29W8000IT |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 1M x 8 Bit NAND Flash Memory(1M x 8 位 NAND閃速存儲器) |
| 中文描述： | 100萬× 8位NAND快閃記憶體（1米× 8位的NAND閃速存儲器） |
| 文件頁數(shù)： | 9/23頁 |
| 文件大?。?/td> | 266K |
| 代理商： | KM29W8000IT |
KM29W8000T, KM29W8000IT
FLASH MEMORY
9
Identifying Invalid Block(s) in the KM29W8000
All device locations are erased(FFh) prior to shipping. Device with invalid Block(s) will be randomly written with 00h data with in the
frist or second page in the invalid Block(s). This page may or may not contain the invalid cell(s). The 00h data just marks the block(s)
that contains the invalid cell(s). A system that can utilize these devices must be able to recognize invalid block(s) via the fo llowing
suggested flow chart
(Figure 1).
INVALID BLOCKS
The KM29W8000 Flash device may or may not contain up to 5 invalid blocks. Invalid blocks are defined as blocks that contain one or
more invalid bits. Typically, an invalid block will contain a single bad bit. Devices with invalid block(s) have the same qualit y levels as
devices with all valid blocks and have the same AC and DC characteristics. An invalid block(s) does not affect the performance o f
valid block(s) because it is isolated from the bit line and the common source line by a select transistor. The system design mus t be
able to mask out the invalid block(s) via address mapping. The 1st block of the KM29W8000, however, is fully guaranteed to be a
good block.
KM29W8000 Technical Notes
Figure 1. Flow chart to create invalid block table.
Start
Set : Block = 0
Check "FF"
Set : Block n + 1
Block = 255
End
Create (or update)
invalid block(s) Table
No
No
Yes
Yes
*
For the 1st or 2nd page
*
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