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參數(shù)資料
| 型號(hào)： | KM29N16000AIT |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 2Mx8 Bit NAND Flash Memory(2Mx8位 NAND閃速存儲(chǔ)器) |
| 中文描述： | 2Mx8位NAND閃存（2Mx8位的NAND閃速存儲(chǔ)器） |
| 文件頁數(shù)： | 17/23頁 |
| 文件大?。?/td> | 267K |
| 代理商： | KM29N16000AIT |
KM29N16000AT, KM29N16000AIT
FLASH MEMORY
17
DEVICE OPERATION
PAGE READ
Upon initial device power up, the device defaults to Read1 mode. This operation is also initiated by writing 00H to the command reg-
ister along with three address cycles. Once the command is latched, it does not need to be written for the following page read o pera-
tion. Three types of operations are available : random read, sequential page read and sequential row read.
The random read mode is enabled when the page address is changed. The 264 bytes of data within the selected page are trans-
ferred to the data registers in less than 10
μ
s(t
R
). The CPU can detect the completion of this data transfer(t
R
) by analyzing the output
of R/B pin. Once the data in a page is loaded into the registers, they may be read out in 80ns cycle time by sequentially pulsing RE
with CE staying low. High to low transitions of the RE clock output the data starting from the selected column address up to the last
column address(column 264).
After the data of last column address is clocked out, the next page is automatically selected for sequential read.
Waiting 10
μ
s again allows for reading of the page. The sequential row read operation is terminated by bringing CE to high. The way
the Read1 and Read2 commands work is like a pointer set to either the main area or the spare area. The spare area of bytes 256 t o
263 may be selectively accessed by writing the Read2 command. Addresses A
0
to A
2
set the starting address of the spare area while
addresses A
3
to A
7
are ignored. Unless the operation is aborted, the page address is automatically incremented for sequential row
read as in Read1 operation and spare eight bytes of each page may be sequentially read. The Read1 command(00H) is needed to
move the pointer back to the main area. Figures 3 thru 6 show typical sequence and timings for each read operation.
Figure 3. Read1 Operation
Start Add.(3Cycle)
00H
A
0
~ A
7
& A
8
~ A
20
Data Output(Sequential)
(00H Command)
Seek Time
Data Field
Spare Field
CE
CLE
ALE
R/B
WE
I/O
0 ~ 7
RE
t
R
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PDF描述 |
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| KM29N16000AT | 2Mx8 Bit NAND Flash Memory(2Mx8位 NAND閃速存儲(chǔ)器) |
| KM29N16000ATS | 2M x 8 Bit NAND Flash Memory(2M x 8位 NAND閃速存儲(chǔ)器) |
| KM29N32000IT | 4M x 8 Bit NAND Flash Memory(4M x 8位 NAND閃速存儲(chǔ)器) |
| KM29N32000T | 4M x 8 Bit NAND Flash Memory(4M x 8位 NAND閃速存儲(chǔ)器) |
| KM29N32000TS | 4M x 8 Bit NAND Flash Memory(4M x 8位 NAND閃速存儲(chǔ)器) |
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| KM29U128IT | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:16M x 8 Bit NAND Flash Memory |
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| KM29U64000T | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:8M x 8 Bit NAND Flash Memory |
| KM29V16000AIT | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:FLASH MEMORY |
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