參數(shù)資料
型號： KIT908E624DWBEVB
廠商： Freescale Semiconductor
文件頁數(shù)： 22/39頁
文件大?。?/td> 0K
描述： KIT EVAL 908E624 TRPL W/MCU/LIN
標(biāo)準(zhǔn)包裝： 1
系列： HC08, SMARTMOS™
類型： MCU
適用于相關(guān)產(chǎn)品： MM908E624
所含物品： 板，線纜，CD
相關(guān)產(chǎn)品： MM908E624ACEWR2DKR-ND - IC SWITCH TRPL HI MCU/LIN 54SOIC
MM908E624ACEWR2CT-ND - IC SWITCH TRPL HI MCU/LIN 54SOIC
MM908E624ACDWB-ND - IC TRPL SWITCH MCU/LIN 54-SOIC
MM908E624ACDWBR2-ND - IC TRPL SWITCH MCU/LIN 54-SOIC
MM908E624AYEWR2-ND - IC TRPL SWITCH MCU/LIN 54-SOIC
MM908E624AYEW-ND - IC TRPL SWITCH MCU/LIN 54-SOIC
MM908E624ACEWR2TR-ND - IC SWITCH TRPL HI MCU/LIN 54SOIC
MM908E624ACEW-ND - IC SWITCH TRIPLE MCU/LIN 54-SOIC
Analog Integrated Circuit Device Data
Freescale Semiconductor
29
908E624
TYPICAL APPLICATIONS
PCB Level Programming
If the IC is soldered onto the PCB board, it is typically not
possible to separately power the MCU with +5.0 V, the whole
system has to be powered up providing VSUP (see
Figure 19. Normal Monitor Mode Circuit
Table 14 summarizes the possible configurations and the
necessary setups.
MM908E624
RST_A
RST
IRQ_A
IRQ
VREFL
VDDA
EVDD
VDD
EVSS
AGND
VSUP[1:2]
GND
4.7F
100nF
PTC4/OSC1
PTB3/AD3
PTB4/AD4
PTA0/KBD0
PTA1/KBD1
WDCONF
MAX232
10k
RS232
DB-9
1
3
C1+
C1-
4
5
C2+
C2-
7
8
2
3
5
VCC
GND
16
15
2
V+
V-
6
1F
+
1F
+
1F
+
1F
2
1
3
65
4
74HC125
9.8304MHz CLOCK
VDD
DATA
CLK
VDD
10k
VDD
VTST
VSUP
47F
+
100nF
10
9
T2OUT
R2IN
T2IN
R2OUT
2.2k
VREFH
VSSA
Table 14. Monitor Mode Signal Requirements and Options
Mode
IRQ RST WDCONF
Reset
Vector
Serial
Communication
Mode
Selection
ICG
COP
Normal
Request
Timeout
Communication Speed
PTA0
PTA1
PTB3
PTB4
External
Clock
Bus
Frequenc
y
Baud
Rate
Normal
Monitor
VTST VDD
GND
X
1
0
1
OFF
disabled
9.8304
MHz
2.4576
MHz
9600
Forced
Monitor
VDD
GND
$FFFF
(blank)
10
X
OFF
disabled
9.8304
MHz
2.4576
MHz
9600
GND
ON
disabled
—
Nominal
1.6 MHz
Nominal
6300
User
VDD
REXT
not $FFFF
(not blank)
X
ON
enabled
—
Nominal
1.6 MHz
Nominal
6300
Notes
34.
PTA0 must have a pull-up resistor to VDD in monitor mode.
35.
External clock is a 4.9152 MHz, 9.8304 MHz or 19.6608 MHz canned oscillator on OCS1.
36.
Communication speed with external clock is depending on external clock value. Baud rate is bus frequency / 256.
37.
X = don’t care.
38.
VTST is a high voltage VDD + 3.5 V ≤ VTST ≤ VDD + 4.5 V.
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