參數(shù)資料
型號(hào): KBE00S003M
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 1Gb NAND*2 + 256Mb Mobile SDRAM*2
中文描述: 1Gb的NAND * 2 256Mb的移動(dòng)SDRAM * 2
文件頁(yè)數(shù): 35/86頁(yè)
文件大?。?/td> 1808K
代理商: KBE00S003M
MCP MEMORY
35
KBE00S003M-D411
Revision 1.0
May 2005
Copy-Back Program
The copy-back program is configured to quickly and efficiently rewrite data stored in one page within the plane to another page within
the same plane without utilizing an external memory. Since the time-consuming sequently-reading and its re-loading cycles are
removed, the system performance is improved. The benefit is especially obvious when a portion of a block is updated and the rest of
the block also need to be copied to the newly assigned free block. The operation for performing a copy-back program is a sequential
execution of page-read without burst-reading cycle and copying-program with the address of destination page. A normal read opera-
tion with "00h" command and the address of the source page moves the whole 528bytes data into the internal page registers. As
soon as the device returns to Ready state, Page-Copy Data-input command (8Ah) with the address cycles of destination page fol-
lowed may be written. The Program Confirm command (10h) is required to actually begin the programming operation. Copy-Back
Program operation is allowed only within the same memory plane. Once the Copy-Back Program is finished, any additional partial
page programming into the copied pages is prohibited before erase. A14, A15 and A27 must be the same between source and target
page. Figure18 shows the command sequence for single plane operation. "When there is a program-failure at Copy-Back operation,
error is reported by pass/fail status. But, if Copy-Back operations are accumulated over time, bit error due to charge loss is not
checked by external error detection/correction scheme. For this reason, two bit error correction is recommended for the use of Copy-
Back operation."
Figure 16. 1-page Copy-Back program Operation
00h
A
0
~ A
7
& A
9
~ A
27
Source Address
I/O
X
R/B
Add.(4Cycles)
I/O
0
Pass
8Ah
70h
Fail
A
0
~ A
7
& A
9
~ A
27
Destination Address
Add.(4Cycles)
t
R
10h
t
PROG
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