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參數(shù)資料
| 型號(hào)： | KB2514 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS |
| 中文描述： | 視頻放大器合并OSD處理器的顯示器 |
| 文件頁數(shù)： | 25/55頁 |
| 文件大?。?/td> | 563K |
| 代理商： | KB2514 |
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KB2514 VIDEO AMP MERGED OSD PROCESSOR FOR MONITORS
24
Preliminary
Frame Control
Registers - 0
(Row15,
Column00)
EN
(Bit 0)
OSD enable
OSD is enabled when this bit is '1'. In other words, if this bit isn't '1'OSD is
not output inspite of writing control data. We recommend that you enable
the OSD after setting the control registers (such as the character & attribute
register) because of video and OSD output timing.
RAM erasing
If this bit is '1', the RAM data (character & attribute registers) is erased. The
time spent in carrying out this operation is called erasing time, which can be
calculated as follows.
Erase
(Bit 1)
Therefore, the maximum erasing time value is:
BliT
(Bit 2)
BliEN
(Bit 3)
Blink time control
If this bit is '1', blink time is 0.5sec, and if not, 1sec.
Blinking enable
Blinking effect is controlled by this bit.
If this bit is ’1’, blinking effect is enabled.
If this bit is '0', a full OSD screen blinking effect is disabled.
Scroll time control
If this bit is '1', scroll time is 0.5sec, and if not, 1sec.
Scroll enable
Scrolling effect is controlled by this bit. If this bit is '1', scrolling effect is
enabled. You must remember that scrolling can be turned on/off only when
OSD is enabled/disabled.
Back ground enable
If the BGEN bit is '1' and the raster color is black, the raster is transparent.
That is, the video back ground is shown. If not, the OSD raster covers the
video’s back ground. Refer to other color effect.
Extended code enable
If the EX-EN bit is '1', the Character & Attribute register’s Blink, SHA bits
carry out Extended Code features instead of Blink and SHA features.
Full white pattern enable
If the FullW bit is '1', the full white pattern is displayed in the screen.
ScrT
(Bit 4)
ScrEN
(Bit 5)
BGEN
(Bit 6)
EX-EN
(Bit 7)
FullW
(Bit 8)
Table 11. Register Description(Continued)
Registers
Bits
Description
Erasing time = RAM clock
×
480 (RAM cell no.)
RAM clock = 12 dot clock
Dot clock = 1/(dot frequency)
Dot frequency = Horizontal frequency
×
resolution (mode)
(Erasing Time)
MAX
= (12
×
480) / (15k
×
320) = 1.2ms
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