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參數(shù)資料
| 型號： | K9K1208U0M |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 64M x 8 Bit NAND Flash Memory |
| 中文描述： | 6400 × 8位NAND閃存 |
| 文件頁數(shù)： | 7/26頁 |
| 文件大?。?/td> | 354K |
| 代理商： | K9K1208U0M |
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K9K1208U0M-YCB0, K9K1208U0M-YIB0
FLASH MEMORY
7
VALID BLOCK
NOTE
:
1. The
K9K1208U0M
may include invalid blocks when first shipped. Additional invalid blocks may develop while being used. The number of valid
blocks is presented with both cases of invalid blocks considered. Invalid blocks are defined as blocks that contain one or more bad bits
. Do not try
to access these invalid blocks for program and erase.
Refer to the attached technical notes for a appropriate management of invalid blocks.
2. The 1st block, which is placed on 00h block address, is guaranteed to be a valid block
Parameter
Symbol
Min
Typ.
Max
Unit
Valid Block Number
N
VB
4,026
-
4,096
Blocks
Program/Erase Characteristics
Parameter
Symbol
Min
Typ
Max
Unit
Program Time
t
PROG
-
200
500
μ
s
Number of Partial Program Cycles
in the Same Page
Main Array
Nop
-
-
2
cycles
Spare Array
-
-
3
cycles
Block Erase Time
t
BERS
-
2
3
ms
CAPACITANCE
(
T
A
=25
°
C, V
CC
=3.3V, f=1.0MHz)
NOTE
: Capacitance is periodically sampled and not 100% tested.
Item
Symbol
Test Condition
Min
Max
Unit
Input/Output Capacitance
C
I/O
V
IL
=0V
-
30
pF
Input Capacitance
C
IN
V
IN
=0V
-
30
pF
AC TEST CONDITION
(K9K1208U0M-YCB0 :TA=0 to 70
°
C, K9K1208U0M-YIB0:TA=-40 to 85
°
C, VCC=2.7V~3.6V unless otherwise)
Parameter
Value
Input Pulse Levels
0.4V to 2.4V
Input Rise and Fall Times
5ns
Input and Output Timing Levels
1.5V
Output Load (3.0V +/-10%)
1 TTL GATE and CL=50pF
Output Load (3.3V +/-10%)
1 TTL GATE and CL=100pF
MODE SELECTION
NOTE
: 1. X can be V
IL
or V
IH.
2. WP should be biased to CMOS high or CMOS low for standby.
3. When GND input is high, spare area is deselected.
CLE
ALE
CE
WE
RE
GND
WP
Mode
H
L
L
H
X
X
Read Mode
Command Input
L
H
L
H
X
X
Address Input(4clock)
H
L
L
H
X
H
Write Mode
Command Input
L
H
L
H
X
H
Address Input(4clock)
L
L
L
H
L/H
(3)
H
Data Input
L
L
L
H
L/H
(3)
X
Sequential Read & Data Output
L
L
L
H
H
L/H
(3)
X
During Read(Busy)
X
X
X
X
X
L/H
(3)
H
During Program(Busy)
X
X
X
X
X
X
H
During Erase(Busy)
X
X
(1)
X
X
X
X
L
Write Protect
X
X
H
X
X
0V/V
CC
(2)
0V/V
CC
(2)
Stand-by
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K9K1208U0M-YCB0 | 64M x 8 Bit NAND Flash Memory |
| K9K1208U0M-YIB0 | 64M x 8 Bit NAND Flash Memory |
| K9K1G08U0M-YCB0 | 128M x 8 Bit NAND Flash Memory |
| K9K1G08U0M-YIB0 | 128M x 8 Bit NAND Flash Memory |
| K9K2G08U0A | TV 8C 8#16 PIN WALL RECP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K9K1208U0M-YCB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64M x 8 Bit NAND Flash Memory |
| K9K1208U0M-YIB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64M x 8 Bit NAND Flash Memory |
| K9K1216D0C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64M x 8 Bit , 32M x 16 Bit NAND Flash Memory |
| K9K1216Q0C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64M x 8 Bit , 32M x 16 Bit NAND Flash Memory |
| K9K1216U0C | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:64M x 8 Bit , 32M x 16 Bit NAND Flash Memory |
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