參數(shù)資料
型號: K9K1208U0A-YCB0
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: TV 16C 16#16 SKT RECP
中文描述: 6400 × 8位NAND閃存
文件頁數(shù): 25/27頁
文件大?。?/td> 357K
代理商: K9K1208U0A-YCB0
K9K1208U0A-YCB0, K9K1208U0A-YIB0
FLASH MEMORY
25
Figure 10. RESET Operation
RESET
The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state during random
read, program or erase mode, the reset operation will abort these operations. The contents of memory cells being altered are no
longer valid, as the data will be partially programmed or erased. The command register is cleared to wait for the next command, and
the Status Register is cleared to value C0h when WP is high. Refer to table 3 for device status after reset operation. If the device is
already in reset state a new reset command will not be accepted by the command register. The R/B pin transitions to low for tRST
after the Reset command is written. Reset command is not necessary for normal operation. Refer to Figure 10 below.
After Power-up
After Reset
Operation Mode
Read 1
Waiting for next command
FFh
I/O
0
~
7
R/B
Table3. Device Status
t
RST
READY/BUSY
The device has a R/B output that provides a hardware method of indicating the completion of a page program, erase and random
read completion. The R/B pin is normally high but transitions to low after program or erase command is written to the command reg-
ister or random read is started after address loading. It returns to high when the internal controller has finished the operation. The pin
is an open-drain driver thereby allowing two or more R/B outputs to be Or-tied. An appropriate pull-up resister is required for proper
operation and the value may be calculated by the following equation.
V
CC
R/B
open drain output
Device
GND
Rp =
V
CC
(Max.) - V
OL
(Max.)
I
OL
+
Σ
I
L
=
3.2V
8mA
+
Σ
I
L
where I
L
is the sum of the input currents of all devices tied to the
R/B pin.
Rp
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