參數(shù)資料
型號(hào)： K9F8008W0M-
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
元件分類： 圓形連接器
英文描述： Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TVPS00; Number of Contacts:37; Connector Shell Size:25; Connecting Termination:Crimp; Circular Shell Style:Wall Mount Receptacle; Body Style:Straight
中文描述： 100萬× 8位NAND快閃記憶體
文件頁數(shù)： 22/25頁
文件大?。?/td> 445K
代理商： K9F8008W0M-
K9F8008W0M-TCB0, K9F8008W0M-TIB0
FLASH MEMORY
22
Figure 8. Block Erase Operation
BLOCK ERASE
The Erase operation is done on a block(4K Byte) basis. Block address loading is accomplished in two cycles initiated by an Erase
Setup command(60H). Only address A
12
to A
19
is valid while A
8
to A
11
is ignored. The Erase Confirm command(D0H) following the
block address loading initiates the internal erasing process. This two-step sequence of setup followed by execution command
ensures that memory contents are not accidentally erased due to external noises conditions.
At the rising edge of WE after the erase confirm command input, the internal write controller handles erase, erase-verify and pulse
repetition where required. If an erase operation error is detected, the internal verify is halted and erase operation is terminated. When
the erase operation is complete, the Write Status Bit(I/O
0
) may be checked.
Figure 8 details the sequence.
60H
Block Add. : A
8
~ A
19
I/O
0
~
7
R/B
Address Input(2Cycle)
I/O
0
Pass
D0H
70H
Fail
READ STATUS
The device contains a Status Register which may be read to find out whether program or erase operation is complete, and whether
the program or erase operation is completed successfully. After writing 70H command to the command register, a read cycle outputs
the contents of the Status Register to the I/O pins on the falling edge of CE or RE, whichever occurs last. This two line control allows
the system to poll the progress of each device in multiple memory connections even when R/B pins are common-wired. RE or CE
does not need to be toggled for updated status. Refer to table 2 for specific Status Register definitions. The command register
remains in Status Read mode until further commands are issued to it. Therefore, if the status register is read during a random read
cycle, a read command(00H or 50H) should be given before sequential page read cycle.
SR
Status
Definition
I/O
0
Program / Erase
"0" : Successful Program / Erase
"1" : Error in Program / Erase
I/O
1
Reserved for Future
Use
"0"
I/O
2
"0"
I/O
3
"0"
I/O
4
"0"
I/O
5
"0"
I/O
6
Device Operation
"0" : Busy "1" : Ready
I/O
7
Write Protect
"0" : Protected "1" : Not Protected
Table2. Status Register Definition
t
BERS
相關(guān)PDF資料
PDF描述
K9F8008W0M-TCB0 Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TVPS00; No. of Contacts:37; Connector Shell Size:25; Connecting Termination:Crimp; Circular Shell Style:Wall Mount Receptacle; Body Style:Straight
K9F8008W0M-TIB0 Circular Connector; MIL SPEC:MIL-DTL-38999 Series III; Body Material:Metal; Series:TVPS00; Number of Contacts:37; Connector Shell Size:25; Connecting Termination:Crimp; Circular Shell Style:Wall Mount Receptacle; Body Style:Straight
K9K1208U0A-YCB0 TV 16C 16#16 SKT RECP
K9K1208U0A-YIB0 64M x 8 Bit NAND Flash Memory
K9K1208U0M 64M x 8 Bit NAND Flash Memory
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
K9F8008W0M-TCB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 8 bit NAND Flash Memory
K9F8008W0M-TIB0 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 8 bit NAND Flash Memory
K9F8G08U0M-PCK0000 制造商:Samsung 功能描述:K9F8G08U0M-PCK0000NAND FLASH - Trays
K9G4G08B0A 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:Preliminary FLASH MEMORY
K9G4G08U0A 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:Preliminary FLASH MEMORY
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