參數(shù)資料
型號(hào): K4S643232C-TL70
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Dual Low-Noise Precision Rail-To-Rail Operational Amplifier 14-SOIC
中文描述: 200萬(wàn)× 32內(nèi)存為512k × 32 × 4銀行同步DRAM LVTTL
文件頁(yè)數(shù): 28/43頁(yè)
文件大?。?/td> 1155K
代理商: K4S643232C-TL70
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
CMOS SDRAM
K4S643232C
REV. 1.1 Nov. '99
- 28
Read & Write Cycle at Same Bank @Burst Length=4
HIGH
: Don't care
*Note :
1. Minimum row cycle times is required to complete internal DRAM operation.
2. Row precharge can interrupt burst on any cycle. [CAS Latency - 1] number of valid output data
is available after Row precharge. Last valid output will be Hi-Z(t
SHZ
) after the clcok.
3. Access time from Row active command. t
CC
*(t
RCD
+ CAS latency - 1) + t
SAC
4. Ouput will be Hi-Z after the end of burst. (1, 2, 4, 8 & Full page bit burst)
5. For -55/60/70/80/10, tRDL=1CLK product can be supported within restricted amounts and it will be distinguished by bucket code
"NV". From the next generation, tRDL will be only 2CLK for every clock frequency
*Note 1
tRC
tRCD
*Note 2
tRDL
*Note 5
tRDL
*Note 5
tSHZ
*Note 4
tSHZ
*Note 4
tOH
tRAC
*Note 3
tSAC
tSAC
tRAC
*Note 3
tOH
BA
0
BA
1
A
10
/AP
CL=2
CL=3
DQ
ADDR
CAS
RAS
CS
CKE
CLOCK
Ra
Rb
Qa0
Qa1
Qa2
Qa3
Qa0
Qa1
Qa2
Qa3
Db0
Db1
Db2
Db3
Db0
Db1
Db2
Db3
Ra
Ca
Rb
Cb
WE
DQM
Row Active
(A-Bank)
Precharge
(A-Bank)
Row Active
(A-Bank)
Write
(A-Bank)
Precharge
(A-Bank)
Read
(A-Bank)
相關(guān)PDF資料
PDF描述
K4S643232C-TL80 Dual Low-Noise Precision Rail-To-Rail Operational Amplifier 8-PDIP
K4S643232C Replaced by TLC2201A : Advanced LinCMOS(TM) Low-Noise Precision Operational Amplifier 8-PDIP 0 to 70
K4S643232C-TC10 Low Noise Precision Advanced LinCMOS(TM) Single Operational Amplifier 20-LCCC -55 to 125
K4S643232C-TC55 Low Noise Precision Advanced LinCMOS(TM) Single Operational Amplifier 8-CDIP -55 to 125
K4S643232C-TC60 Low Noise Precision Advanced LinCMOS(TM) Single Operational Amplifier 20-LCCC -55 to 125
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