參數(shù)資料
型號: K4S643232C-TC60
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Low Noise Precision Advanced LinCMOS(TM) Single Operational Amplifier 20-LCCC -55 to 125
中文描述: 200萬× 32內(nèi)存為512k × 32 × 4銀行同步DRAM LVTTL
文件頁數(shù): 31/43頁
文件大?。?/td> 1155K
代理商: K4S643232C-TC60
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
CMOS SDRAM
K4S643232C
REV. 1.1 Nov. '99
- 31
Page Write Cycle at Different Bank @Burst Length=4
HIGH
Row Active
(A-Bank)
Write
(A-Bank)
Row Active
(D-Bank)
Write
(D-Bank)
: Don't care
*Note :
1. To interrupt burst write by Row precharge, DQM should be asserted to mask invalid input data.
2. To interrupt burst write by Row precharge, both the write and the precharge banks must be the same.
3.For -55/60/70/80/10, tRDL=1CLK product can be supported within restricted amounts and it will be distinguished by bucket code
"NV". From the next generation, tRDL will be only 2CLK for every clock frequency
Row Active
(B-Bank)
tRDL
Row Active
(C-Bank)
Precharge
(All Banks)
tCDL
Write
(B-Bank)
Write
(C-Bank)
*Note 1
BA
0
BA
1
DQ
ADDR
CAS
RAS
CS
CKE
CLOCK
WE
DQM
A
10
/AP
RAa
RBb
CAa
CBb
RCc
RDd
CCc
CDd
RCc
RDd
RAa
RBb
*Note 2
DAa0
DAa1 DAa2
DAa3
DBb0
DBb1
DBb2 DBb3
DCc0
DCc1
DDd0
DDd1
DDd2
*Note 3
相關(guān)PDF資料
PDF描述
K4S643232C-TC70 Low Noise Precision Advanced LinCMOS(TM) Single Operational Amplifier 8-CDIP -55 to 125
K4S643232E 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL
K4S643232E-TE70 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL(3.3V)
K4S643232E-TC45 2M x 32 SDRAM 512K x 32bit x 4 Banks Synchronous DRAM LVTTL
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