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參數(shù)資料
| 型號： | K4H513238M-TLA2 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Quad Wide Bandwidth High Output Drive Single Supply Op Amp 14-SOIC -40 to 125 |
| 中文描述： | 128MB DDR SDRAM的 |
| 文件頁數(shù)： | 30/53頁 |
| 文件大?。?/td> | 669K |
| 代理商： | K4H513238M-TLA2 |
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- 30 -
REV. 1.0 November. 2. 2000
128Mb DDR SDRAM
3.3.12 Write with Auto Precharge
If A10 is high when write command is issued , the write with auto-precharge function is performed. Any new
command to the same bank should not be issued until the internal precharge is completed. The internal pre-
charge begins after keeping tWR(min).
Command
< Burst Length=4 >
BANK A
ACTIVE
NOP
WRITE A
Auto Precharge
NOP
NOP
NOP
NOP
NOP
NOP
DQS
DQ
′
s
Din 0 Din 1 Din 2
Din 3
* completion of
t
RP
t
WR
t
RP
Internal precharge start
2
0
1
5
3
4
8
6
7
CK
CK
Figure 20. Write with auto precharge timing
Asserted
command
For same Bank
For Different Bank
3
4
5
6
7
8
3
4
5
6
7
WRITE
WRITE+
No AP
*1
WRITE+
No AP
WRITE+
No AP
Illegal
Illegal
Illegal
Legal
Legal
Legal
Legal
Legal
WRITE+
AP
WRITE+
AP
WRITE+
AP
WRITE+
AP
Illegal
Illegal
Illegal
Legal
Legal
Legal
Legal
Legal
READ
Illegal
READ+NO
AP+DM
*2
READ+NO
AP+DM
READ+
NO AP
READ+
NO AP
Illegal
Illegal
Illegal
Legal
Legal
Legal
READ+AP
Illegal
READ +
AP+DM
READ +
AP+DM
READ +
AP
READ +
AP
Illegal
Illegal
Illegal
Legal
Legal
Legal
Active
Illegal
Illegal
Illegal
Illegal
Illegal
Illegal
Legal
Legal
Legal
Legal
Legal
Precharge
Illegal
Illegal
Illegal
Illegal
Illegal
Illegal
Legal
Legal
Legal
Legal
Legal
*1
: AP = Auto Precharge
*2
: DM : Refer to "
3.3.7 Write Interrupted by a Read & DM "
in page 25.
Table 7. Operating description when new command asserted
while write with auto precharge is issued
Burst length = 4
相關PDF資料 |
PDF描述 |
|---|---|
| K4H513238M-TLB0 | Quad Wide Bandwidth High Output Drive Single Supply Op Amp 14-PDIP -40 to 125 |
| K4H563238A-TCA2 | 10-Bit, 164 kSPS ADC Parallel Out, Direct I/F to DSP/uProcessor, 10 Ch. 24-SOIC -40 to 85 |
| K4H563238A-TCB0 | 10-Bit, 164 kSPS ADC Parallel Out, Direct I/F to DSP/uProcessor, 10 Ch. 24-SOIC -40 to 85 |
| K4H563238A-TLA0 | 10-Bit, 164 kSPS ADC Parallel Out, Direct I/F to DSP/uProcessor, 10 Ch. 28-PLCC -40 to 85 |
| K4H563238A-TLA2 | 128Mb DDR SDRAM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| K4H513238M-TLB0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
| K4H56038D-TC | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256Mb D-die DDR400 SDRAM Specification |
| K4H560438 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
| K4H560438A-TCA0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
| K4H560438A-TCA2 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:128Mb DDR SDRAM |
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