參數(shù)資料
型號: K4H513238M-TLA2
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: Quad Wide Bandwidth High Output Drive Single Supply Op Amp 14-SOIC -40 to 125
中文描述: 128MB DDR SDRAM的
文件頁數(shù): 24/53頁
文件大?。?/td> 669K
代理商: K4H513238M-TLA2
- 24 -
REV. 1.0 November. 2. 2000
128Mb DDR SDRAM
3.3.6 Write Interrupted by a Write
A Burst Write can be interrupted before completion of the burst by a new Write command, with the only restric-
tion that the interval that separates the commands must be at least one clock cycle. When the previous burst
is interrupted, the remaining addresses are overridden by the new address and data will be written into the
device until the programmed burst length is satisfied.
Command
< Burst Length=4 >
NOP
WRITE A
WRITE b
NOP
NOP
NOP
NOP
NOP
NOP
DQS
DQ
s
Din A
0
Din A
1
Din B
0
Din B
1
Din B
2
Din B
3
1t
CK
2
0
1
5
3
4
8
6
7
CK
CK
Figure 14. Write interrupted by a write timing
相關(guān)PDF資料
PDF描述
K4H513238M-TLB0 Quad Wide Bandwidth High Output Drive Single Supply Op Amp 14-PDIP -40 to 125
K4H563238A-TCA2 10-Bit, 164 kSPS ADC Parallel Out, Direct I/F to DSP/uProcessor, 10 Ch. 24-SOIC -40 to 85
K4H563238A-TCB0 10-Bit, 164 kSPS ADC Parallel Out, Direct I/F to DSP/uProcessor, 10 Ch. 24-SOIC -40 to 85
K4H563238A-TLA0 10-Bit, 164 kSPS ADC Parallel Out, Direct I/F to DSP/uProcessor, 10 Ch. 28-PLCC -40 to 85
K4H563238A-TLA2 128Mb DDR SDRAM
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