參數(shù)資料
型號(hào)： K4D553235F-GC
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 256M GDDR SDRAM
中文描述： 256M GDDR SDRAM內(nèi)存
文件頁(yè)數(shù)： 15/18頁(yè)
文件大小： 386K
代理商： K4D553235F-GC
256M GDDR SDRAM
K4D553235F-GC
- 15 -
Rev 1.6 (May 2005)
AC CHARACTERISTICS (II)
Note : 1. For normal write operation, even numbers of Din are to be written inside DRAM
2. The number of clock of tRC is restricted by the number of clock of tRAS and tRP
3. The number of clock of tWR_A is fixed. It can’t be changed by tCK. tWR_A is related with CL. It is equal to CL+1tCK.
4. tRCDWR is equal to tRCDRD-2tCK and the number of clock can not be lower than 2tCK.
5. The minimum number of clock cycles is determined by dividing the minimum time required with clock cycle time and then
rounding off to the next higher integer unconditionally.
Parameter
Symbol
-25
-2A
-33
Unit
Note
Min
45
50
28.6
15
10
15
Max
-
-
100K
-
-
-
Min
45.8
51.5
28.6
16.5
11.4
16.5
Max
-
-
100K
-
-
-
Min
49.5
56.1
33
16.5
11.4
16.5
Max
-
-
100K
-
-
-
Row cycle time
Refresh row cycle time
Row active time
RAS to CAS delay for Read
RAS to CAS delay for Write
Row precharge time
Last data in to Row precharge @Normal
Precharge
Last data in to Row precharge @Auto Pre-
charge
Auto precharge write recovery + Precharge tDAL
Row active to Row active
Last data in to Read command
Col. address to Col. address
Mode register set cycle time
Exit self refresh to read command
tRC
tRFC
tRAS
tRCDRD
tRCDWR
tRP
ns
ns
ns
ns
ns
ns
2,5
5
5
5
4,5
5
tWR
15
-
16.5
-
16.5
-
ns
1,5
tWR_A
6
-
6
-
5
-
tCK
1,3
30
4
2
1
4
200
3tCK+
tIS
7.8
-
-
-
-
-
-
33
4
2
1
3
200
3tCK+
tIS
7.8
-
-
-
-
-
-
33
3
2
1
3
200
3tCK+
tIS
7.8
-
-
-
-
-
-
ns
tCK
tCK
tCK
tCK
tCK
3,5
tRRD
tCDLR
tCCD
tMRD
tXSR
1
Power down exit time
tPDEX
-
-
-
ns
Refresh interval time
tREF
-
-
-
us
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參數(shù)描述
K4D553235F-GC25 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:256M GDDR SDRAM
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