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參數(shù)資料
| 型號： | K4D263238E |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | Aluminum Electrolytic Radial Lead Hi Temp 150 Deg Capacitor; Capacitance: 100uF; Voltage: 100V; Case Size: 12.5x25 mm; Packaging: Bulk |
| 中文描述： | 100萬x 32Bit的× 4銀行圖形雙數(shù)據(jù)速率同步DRAM的雙向數(shù)據(jù)選通和DLL |
| 文件頁數(shù)： | 3/17頁 |
| 文件大小： | 310K |
| 代理商： | K4D263238E |
128M GDDR SDRAM
K4D263238E-GC
1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM
with Bi-directional Data Strobe and DLL
- 3 -
Rev 1.7 (Nov. 2003)
The K4D263238E is 134,217,728 bits of hyper synchronous data rate Dynamic RAM organized as 4 x1,048,576 words by
32 bits, fabricated with SAMSUNG
’
s high performance CMOS technology. Synchronous features with Data Strobe allow
extremely high performance up to 3.2GB/s/chip. I/O transactions are possible on both edges of the clock cycle. Range of
operating frequencies, programmable burst length and programmable latencies allow the device to be useful for a variety
of high performance memory system applications.
VDD/VDDQ = 2.8V ± 5% for -GC25
VDD/VDDQ = 2.5V ± 5% for -GC2A/33/36/40/45
SSTL_2 compatible inputs/outputs
4 banks operation
MRS cycle with address key programs
-. Read latency 3, 4, 5 (clock)
-. Burst length (2, 4, 8 and Full page)
-. Burst type (sequential & interleave)
Full page burst length for sequential burst type only
Start address of the full page burst should be even
All inputs except data & DM are sampled at the positive
going edge of the system clock
Differential clock input
GENERAL DESCRIPTION
FEATURES
No Wrtie-Interrupted by Read Function
4 DQS’s ( 1DQS / Byte )
Data I/O transactions on both edges of Data strobe
DLL aligns DQ and DQS transitions with Clock transition
Edge aligned data & data strobe output
Center aligned data & data strobe input
DM for write masking only
Auto & Self refresh
32ms refresh period (4K cycle)
144-Ball FBGA
Maximum clock frequency up to 400MHz
Maximum data rate up to 800Mbps/pin
FOR 1M x 32Bit x 4 Bank DDR SDRAM
ORDERING INFORMATION
K4D263238E-VC is the Lead Free package part number.
Part NO.
Max Freq.
Max Data Rate
Interface
Package
K4D263238E-GC25
400MHz
800Mbps/pin
SSTL_2
(VDD/VDDQ=2.8V)
144-Ball FBGA
K4D263238E-GC2A
350MHz
700Mbps/pin
SSTL_2
(VDD/VDDQ=2.5V)
K4D263238E-GC33
300MHz
600Mbps/pin
K4D263238E-GC36
275MHz
550Mbps/pin
K4D263238E-GC40
250MHz
500Mbps/pin
K4D263238E-GC45
222MHz
444Mbps/pin
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| K4D263238E-GC25 | DIODE ZENER SINGLE 300mW 15.2Vz 10mA-Izt 0.02535 0.05uA-Ir 12 SOT-23 3K/REEL |
| K4D263238E-GC2A | DIODE ZENER TRIPLE ISOLATED 200mW 15.2Vz 10mA-Izt 0.02535 0.05uA-Ir 12 SOT-363 3K/REEL |
| K4D263238E-GC33 | DIODE ZENER SINGLE 300mW 16.1Vz 10mA-Izt 0.02547 0.05uA-Ir 12 SOT-23 3K/REEL |
| K4D263238E-GC36 | DIODE ZENER TRIPLE ISOLATED 200mW 16.1Vz 10mA-Izt 0.02547 0.05uA-Ir 12 SOT-363 3K/REEL |
| K4D263238E-GC40 | DIODE ZENER SINGLE 300mW 17.9Vz 10mA-Izt 0.02545 0.05uA-Ir 14 SOT-23 3K/REEL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| K4D263238E-GC25 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL |
| K4D263238E-GC2A | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL |
| K4D263238E-GC33 | 制造商:SAMSG 功能描述: |
| K4D263238E-GC36 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL |
| K4D263238E-GC40 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL |
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