參數(shù)資料
型號(hào)： JS28F640P30T85
廠商： INTEL CORP
元件分類： DRAM
英文描述： Intel StrataFlash Embedded Memory
中文描述： 4M X 16 FLASH 1.8V PROM, 85 ns, PDSO56
封裝： 14 X 20 MM, LEAD FREE, TSOP-56
文件頁數(shù)： 58/102頁
文件大小： 1609K
代理商： JS28F640P30T85
1-Gbit P30 Family
April 2005
58
Intel StrataFlash
Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet
10.3.4
Data Hold
For burst read operations, the Data Hold (DH) bit determines whether the data output remains valid
on DQ[15:0] for one or two clock cycles. This period of time is called the “
data cycle
”. When DH
is set, output data is held for two clocks (default). When DH is cleared, output data is held for one
clock (see
Figure 30
). The processor’s data setup time and the flash memory’s clock-to-data output
delay should be considered when determining whether to hold output data for one or two clocks. A
method for determining the Data Hold configuration is shown below:
To set the device at one clock data hold for subsequent reads, the following condition must be
satisfied:
t
CHQV
(ns) + t
DATA
(ns)
≤
One CLK Period (ns)
t
DATA
= Data set up to Clock (defined by CPU)
For example, with a clock frequency of 40 MHz, the clock period is 25 ns. Assuming
t
CHQV
= 20 ns and t
DATA
= 4 ns. Applying these values to the formula above:
20 ns + 4 ns
≤
25 ns
The equation is satisfied and data will be available at every clock period with data hold setting at
one clock. If t
CHQV
(ns) + t
DATA
(ns) >
One CLK Period (ns), data hold setting of 2 clock periods
must be used.
Table 24.
WAIT Functionality Table
Condition
WAIT
Notes
CE# = ‘1’, OE# = ‘X’ or CE# = ‘0’, OE# = ‘1’
High-Z
1
CE# =’0’, OE# = ‘0’
Active
1
Synchronous Array Reads
Active
1
Synchronous Non-Array Reads
Active
1
All Asynchronous Reads
Deasserted
1
All Writes
High-Z
1,2
Notes:
1.
2.
Active:
WAIT is asserted until data becomes valid, then deasserts
When OE# = V
IH
during writes, WAIT = High-Z
Figure 30.
Data Hold Timing
Valid
Output
Valid
Output
Valid
Output
Valid
Output
Valid
Output
CLK [C]
D[15:0] [Q]
D[15:0] [Q]
2 CLK
Data Hold
1 CLK
Data Hold
相關(guān)PDF資料
PDF描述
JS28F128P30B85 Intel StrataFlash Embedded Memory
JS4PS-1W Power Splitter/Combiner
JSPHS-1000 180?Voltage Variable, 700 to 1000 MHz
JSPHS-12 Phase Shifter
JSPHS-150 Narrow Band Phase Shifter 50ohm 180 Voltage Variable 100 to 150 MHz
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
JS28F640P30T85A 功能描述:IC FLASH 64MBIT 85NS 56TSOP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:StrataFlash™ 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SDRAM 存儲(chǔ)容量:256M（8Mx32） 速度:143MHz 接口:并聯(lián) 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA（8x13） 包裝:托盤 其它名稱:Q2841869
JS28F640P30TF75A 制造商:Micron Technology Inc 功能描述:PARALLEL NOR - Trays 制造商:Micron Technology Inc 功能描述:MICJS28F640P30TF75A 64MB NOR FLASH MEMOR 制造商:Micron Technology Inc 功能描述:NOR Flash Parallel/Serial 1.8V 64Mbit 4M x 16bit 75ns 56-Pin TSOP Tray 制造商:Micron Technology Inc 功能描述:IC FLASH 64MBIT 75NS 56TSOP
JS28F640P33B85A 功能描述:IC FLASH 64MBIT 85NS 56TSOP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:StrataFlash™ 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標(biāo)準(zhǔn)包裝:136 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步，DDR II 存儲(chǔ)容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應(yīng)商設(shè)備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ
JS28F640P33BF70A 制造商:Micron Technology Inc 功能描述:NOR Flash Parallel/Serial 2.5V/3.3V 64Mbit 4M x 16bit 70ns 56-Pin TSOP Tray 制造商:Micron Technology Inc 功能描述:PARALLEL NOR - Trays 制造商:Micron Technology Inc 功能描述:FLASH PARALLEL 64MBIT 56TSO 制造商:Micron Technology Inc 功能描述:FLASH, PARALLEL, 64MBIT, 56TSOP 制造商:Micron Technology Inc 功能描述:FLASH, PARALLEL, 64MBIT, 56TSOP; Memory Type:Flash - NOR; Memory Size:64Mbit; Memory Configuration:4M x 16bit; Supply Voltage Min:2.3V; Supply Voltage Max:3.6V; Memory Case Style:TSOP; No. of Pins:56; Clock Frequency:40MHz; Access ;RoHS Compliant: Yes
JS28F640P33T85A 功能描述:IC FLASH 64MBIT 85NS 56TSOP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:StrataFlash™ 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標(biāo)準(zhǔn)包裝:136 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步，DDR II 存儲(chǔ)容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應(yīng)商設(shè)備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*