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參數(shù)資料
| 型號： | JANTXV2N6851U |
| 廠商： | International Rectifier |
| 英文描述： | HEXFET Transistor(HEXFET MOS場效應(yīng)管) |
| 中文描述： | 的HEXFET晶體管（馬鞍山的HEXFET場效應(yīng)管） |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 134K |
| 代理商： | JANTXV2N6851U |
IRFE9230, JANTX-, JANTXV-, JANS-, 2N6851U Device
Electrical Characteristics
@ Tj = 25°C (Unless Otherwise Specified)
2
www.irf.com
Parameter
Drain-to-Source Breakdown Voltage
Temperature Coefficient of Breakdown
Voltage
Static Drain-to-Source
On-State Resistance
Gate Threshold Voltage
Forward Transconductance
Zero Gate Voltage Drain Current
Min
-200
—
Typ
—
-0.21
Max Units
—
—
Test Conditions
VGS =0 V, ID = -1.0mA
Reference to 25°C, ID = -1.0mA
BVDSS
BVDSS/
TJ
V
V/°C
RDS(on)
—
—
-2.0
2.2
—
—
—
—
—
—
—
—
0.80
1.68
-4.0
—
-25
-250
VGS = -10V, ID = -2.4A
VGS = -10V, ID = -4.0A
VDS = VGS, ID = -250μA
VDS > 15V, IDS = -2.4A
VDS= 0.8 x Max Rating,VGS=0V
VDS = 0.8 x Max Rating
VGS = 0V, TJ = 125°C
VGS = 20 V
VGS = -20V
VGS = -10V, ID = -4.0A
VDS = Max Rating x 0.5
V
VGS(th)
gfs
IDSS
S (
)
IGSS
IGSS
Qg
Qgs
Qgd
td
(on)
tr
td
(off)
tf
LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Drain Inductance
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1.8
100
-100
35
6.1
21
50
100
80
80
—
nC
VDD = -100V, ID = -4.0A,
RG = 7.5
LS
Internal Source Inductance
—
4.3
—
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
700
200
45
—
—
—
VGS = 0V, VDS = -25 V
f = 1.0MHz
pF
Source-Drain Diode Ratings and Characteristics
Parameter
IS
Continuous Source Current (Body Diode)
ISM
Pulse Source Current (Body Diode)
Min Typ
—
—
Max Units
-4.0
-16
Test Conditions
—
—
VSD
trr
QRR
ton
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
—
—
—
—
—
—
-5.6
400
4.0
V
ns
μC
T
j
= 25°C, IS = -4.0A, VGS = 0V
Tj = 25°C, IF = -4.0A, di/dt
≤
-100A/
μ
s
VDD
≤
-50V
Forward Turn-On Time
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
A
Modified MOSFET symbol
showing the integral reverse
p-n junction rectifier.
nA
nH
ns
Measured fromdrain pad to
die.
Measured fromcenter of
source pad to the end of
source bonding wire.
Modified MOSFET symbol show-
μ
A
Thermal Resistance
Parameter
RthJC
Junction-to-Case
Min Typ Max
—
—
Units
Test Conditions
5.0
K/W
RthJPCB
Junction-to-PC Board
—
—
19
Soldered to a copper clad PC board
Details of notes
through
are on the last page
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