參數(shù)資料
型號(hào)： ISPPAC80-01PI
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： 模擬信號(hào)調(diào)理
英文描述： In-System Programmable Analog Circuit
中文描述： SPECIALTY ANALOG CIRCUIT, PDIP16
封裝： PLASTIC, DIP-16
文件頁(yè)數(shù)： 7/19頁(yè)
文件大?。?/td> 342K
代理商： ISPPAC80-01PI
Specifications
ispPAC80
7
Pin(s)
Symbol
Name
Description
1
2
3
TMS
TCK
TDI
Test Mode Select
Test Clock
Test Data In
Serial interface logic mode select pin (input). JTAG interface mode only.
Serial interface logic clock pin (input). JTAG interface mode only.
Serial interface logic pin (input) for both JTAG and SPI operation modes.
Input data valid on rising edge of TCK (JTAG), or on rising edge of CS (SPI).
Serial interface logic pin (output) for both JTAG and SPI operation modes.
Input data valid on falling edge of TCK (JTAG), or on rising edge of CS (SPI).
Chip select logic input pin. SPI data latch.
Digital pin (input). Commands an auto-calibration sequence on a rising edge.
Enable SPI logic input pin. When high, causes serial port to run in SPI mode.
Ground pin. Should normally be connected to the analog ground plane.
Common-mode voltage reference output pin (+2.5V nominal). Must be
bypassed to GND with a 1
μ
F capacitor.
Differential input pins, using two pins (e.g., IN+ and IN-). Plus or minus
components of V
IN
, where differential V
IN
= V
IN+
- V
IN-
.
Test pin. Connect to GND for proper circuit operation.
Differential output pins, using two pins (e.g., OUT+ and OUT-).
Complementary with respect to V
REFOUT
. Differential V
OUT
= V
OUT+
- V
OUT-
.
Analog supply voltage pin (5V nominal). Should be bypassed to GND with 1
μ
F
and .01
μ
F capacitors.
4
TDO
Test Data Out
5
6
7
8
9
CS
CAL
ENSPI
GND
VREFout
Chip Select
Auto-Calibrate
Enable SPI Mode
Ground
Common-Mode
Reference
Inputs (+ or -)
10, 11
IN
12, 15
13, 14
TEST
OUT
Test Pin
Outputs (+ or -)
16
VS
Supply Voltage
Pin Descriptions
Connection Notes
1. All inputs and outputs are labeled with plus (+) and minus (-) signs. Polarity is labeled for reference and can be
selected externally by reversing pin connections.
2. All analog output pins are
“
hard-wired
”
to internal output devices and should be left open if not used. V
OUT+
and
V
OUT-
should not be tied together as unnecessary power will be dissipated.
3. When the signal input is single-ended, the other half of the unused differential input must be connected to a DC
common-mode reference (usually V
REFOUT
, 2.5V).
相關(guān)PDF資料
PDF描述
ISPPAC80-01SI In-System Programmable Analog Circuit
ISPPAC81 In-System Programmable Analog Circuit
ISPPAC81-01PI In-System Programmable Analog Circuit
ISPPAC81-01SI In-System Programmable Analog Circuit
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ISPPAC80-01SI 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
ISPPAC81 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Analog Circuit
ISPPAC81-01PI 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
ISPPAC81-01SI 功能描述:SPLD - 簡(jiǎn)單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池?cái)?shù)量:10 最大工作頻率:66 MHz 延遲時(shí)間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風(fēng)格:Through Hole 封裝 / 箱體:DIP-24
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