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參數(shù)資料
| 型號： | ISPPAC80-01PI |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | In-System Programmable Analog Circuit |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 14/19頁 |
| 文件大?。?/td> | 342K |
| 代理商： | ISPPAC80-01PI |
Specifications
ispPAC80
14
In-System Programmability
In-System Programming
Figure 4. Configuring the ispPAC80
“
In-System
”
from a PC Parallel Port
The ispPAC80 is an in-system programmable device.
This is accomplished by integrating all high voltage
programming circuitry on-chip. Programming is performed
through a 5-wire, IEEE 1149.1 compliant serial port
interface at normal logic levels. Once a device is pro-
grammed, all configuration information is stored on-chip,
in non-volatile E
2
CMOS memory cells. The specifics of
the IEEE 1149.1 serial interface are described in the
interface section of this data sheet.
User Electronic Signature
A user electronic signature (UES) feature is included in
the E
2
memory of the ispPAC80. It contains 21 bits that
can be configured by the user to store unique data such
as ID codes, revision numbers or inventory control data.
Electronic Security
An electronic security
“
fuse
”
(ESF) bit is provided in every
ispPAC80 device to prevent unauthorized readout of the
E
2
CMOS user bit patterns. Once programmed, this cell
prevents further access to the functional user bits in the
device. This cell can only be erased by reprogramming
the device, so the original configuration can not be
examined once programmed. Usage of this feature is
optional.
Production Programming Support
Once a final configuration is determined, an ASCII format
JEDEC file is created using the PAC-Designer software.
Devices can then be ordered through the usual supply
channels with the user
’
s specific configuration already
preloaded into the devices. By virtue of its standard
interface, compatibility is maintained with existing pro-
duction programming equipment, giving customers a
wide degree of freedom and flexibility in production
planning.
Evaluation Fixture
Included in the basic ispPAC80 Design Kit is an engineer-
ing prototype board that can be connected to the parallel
port of a PC. It demonstrates proper layout techniques for
the ispPAC80 and can be used in real time to check
circuit operation as part of the design process. Input and
output connections as well as a
“
breadboard
”
circuit area
are provided to speed debugging of the circuit.
ispDownload
Cable (6')
4
Other
System
Circuitry
ispPAC80
Device
PAC-Designer
Software
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| ISPPAC81-01PI | In-System Programmable Analog Circuit |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISPPAC80-01SI | 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC81 | 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Analog Circuit |
| ISPPAC81-01PI | 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| ISPPAC81-01SI | 功能描述:SPLD - 簡單可編程邏輯器件 PROGRAMMABLE ANALOG CIRCUIT RoHS:否 制造商:Texas Instruments 邏輯系列:TICPAL22V10Z 大電池數(shù)量:10 最大工作頻率:66 MHz 延遲時間:25 ns 工作電源電壓:4.75 V to 5.25 V 電源電流:100 uA 最大工作溫度:+ 75 C 最小工作溫度:0 C 安裝風格:Through Hole 封裝 / 箱體:DIP-24 |
| ispPAC-CLK5304S-01T48C | 功能描述:時鐘驅(qū)動器及分配 ISP Zero Delay Unv F an-Out Buf-Sngl End RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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