參數(shù)資料
型號： ISPPAC-POWR1014-01TN48I
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： 電源管理
英文描述： In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
中文描述： 10-CHANNEL POWER SUPPLY SUPPORT CKT, PQFP48
封裝： LEAD FREE, TQFP-48
文件頁數(shù)： 4/45頁
文件大小： 999K
代理商： ISPPAC-POWR1014-01TN48I
Lattice Semiconductor
ispPAC-POWR1014/A Data Sheet
4
43
MCLK
Digital I/O
0V to 3.96V
8MHz Clock I/O (Tristate), CMOS Drive - Internal
Pull-up
JTAG Test Data Out
JTAG Test Clock Input
JTAG Test Mode Select - Internal Pull-up
JTAG Test Data In, TDISEL pin = 1 - Internal
Pull-up
JTAG Test Data In (Alternate), TDISEL Pin = 0 -
Internal Pull-up
Select TDI/ATDI Input - Internal Pull-up
I
C Serial Clock Input (ispPAC-POWR1014A Only)
I
C Serial Data, Bi-directional Pin, Open Drain
(ispPAC-POWR1014A Only)
21
22
16
TDO
TCK
TMS
Digital Output
Digital Input
Digital Input
0V to 5.5V
0V to 5.5V
0V to 5.5V
18
TDI
Digital Input
0V to 5.5V
17
ATDI
Digital Input
0V to 5.5V
19
39
TDISEL
SCL
Digital Input
Digital Input
0V to 5.5V
0V to 5.5V
9
2
38
SDA
9
Digital I/O
0V to 5.5V
2
1. [I
N
1...I
N
4] are inputs to the PLD. The thresholds for these pins are referenced by the voltage on VCCI
N
P. Unused I
N
x inputs should be tied
to G
N
DD.
2. I
N
1 pin can also be controlled through JTAG interface.
3. [I
N
2..I
N
4] can also be controlled through I
C/SMBus interface (ispPAC-POWR1014A only).
4. The VMO
N
inputs can be biased independently from VCCA. Unused VMO
N
inputs should be tied to G
N
DD.
5. G
N
DA and G
N
DD pins must be connected together on the circuit board.
6. VCCD and VCCA pins must be connected together on the circuit board.
7. Open-drain outputs require an external pull-up resistor to a supply.
8. The RESETb pin should only be used for cascading two or more ispPAC-POWR1014/A devices.
9. These pins should be connected to G
N
DD (ispPAC-POWR1014 device only).
2
Pin Descriptions (Cont.)
Number
Name
Pin Type
Voltage Range
Description
相關(guān)PDF資料
PDF描述
ISPPAC-POWR1014A In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ispPAC-POWR1014-02T48I 功能描述:監(jiān)控電路 Prec Progm Pwr Sply Seq Mon Trim, IND RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
ispPAC-POWR1014-02TN48I 功能描述:監(jiān)控電路 Prec Prog Pwr Sply Seq Mon Trim IND P-F RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
ISPPAC-POWR1014A 制造商:LATTICE 制造商全稱:Lattice Semiconductor 功能描述:In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
ISPPACPOWR1014A01T48I 制造商:Lattice Semiconductor Corporation 功能描述:Volt Supervisor Sequencer/Monitor 48-Pin TQFP
ispPAC-POWR1014A-01T48I 功能描述:監(jiān)控電路 ispPAC-POWR1014 w/ A DC I RoHS:否 制造商:STMicroelectronics 監(jiān)測電壓數(shù): 監(jiān)測電壓: 欠電壓閾值: 過電壓閾值: 輸出類型:Active Low, Open Drain 人工復位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel
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