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| 型號(hào)： | ISP1161ABM |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Full-speed Universal Serial Bus single-chip host and device controller |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP64 |
| 封裝： | 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-414-1, LQFP-64 |
| 文件頁(yè)數(shù)： | 87/134頁(yè) |
| 文件大?。?/td> | 587K |
| 代理商： | ISP1161ABM |
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Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
87 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
The following example shows the steps which occur in a typical DMA transfer:
1. ISP1161A’s DC receives a data packet in one of its endpoint FIFOs; the packet
must be transferred to memory address 1234H.
2. ISP1161A’s DC asserts the DREQ2 signal requesting the 8237 for a DMA
transfer.
3. The 8237 asks the CPU to release the bus by asserting the HRQ signal.
4. After completing the current instruction cycle, the CPU places the bus control
signals (MEMR, MEMW, IOR and IOW) and the address lines in three-state and
asserts HLDA to inform the 8237 that it has control of the bus.
5. The 8237 now sets its address lines to 1234H and activates the MEMW and IOR
control signals.
6. The 8237 asserts DACK to inform ISP1161A’s DC that it will start a DMA transfer.
7. ISP1161A’s DC now places the word to be transferred on the data bus lines,
because its RD signal was asserted by the 8237.
8. The 8237 waits one DMA clock period and then de-asserts MEMW and IOR. This
latches and stores the word at the desired memory location. It also informs
ISP1161A’s DC that the data on the bus lines has been transferred.
9. ISP1161A’s DC de-asserts the DREQ2 signal to indicate to the 8237 that DMA is
no longer needed. In
Single cycle mode
this is done after each word, in
Burst
mode
following the last transferred word of the DMA cycle.
10. The 8237 de-asserts the DACK output indicating that ISP1161A’s DC must stop
placing data on the bus.
11. The 8237 places the bus control signals (MEMR, MEMW, IOR and IOW) and the
address lines in three-state and de-asserts the HRQ signal, informing the CPU
that it has released the bus.
12. The CPU acknowledges control of the bus by de-asserting HLDA. After activating
the bus control lines (MEMR, MEMW, IOR and IOW) and the address lines, the
CPU resumes the execution of instructions.
For a typical bulk transfer the above process is repeated, once for each byte. After
each byte the address register in the DMA controller is incremented and the byte
counter is decremented. When using 16-bit DMA the number of transfers is 32, and
address incrementing and byte counter decrementing is done by 2 for each word.
12.3 DACK-only mode
The DACK-only DMA mode is selected by setting bit DAKOLY in the
DcHardwareConfiguration register (see
Table 82
). The pin functions for this mode are
shown in
Table 72
. A typical example of ISP1161A’s DC in DACK-only DMA mode is
given in
Figure 41
.
Table 72:
Symbol
DREQ2
DACK2
DACK-only mode: pin functions
Description
DC’s DMA request
DC’s DMA
acknowledge
I/O
O
I
Function
ISP1161A DC requests a DMA transfer
DMA controller confirms the transfer;
also functions as data strobe
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1161ABM,518 | 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1161ABM,551 | 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1161ABM,557 | 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1161ABM-S | 功能描述:IC USB HOST CTRL FULL-SPD 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| ISP1161ABM-T | 功能描述:IC USB HOST CTRL FULL-SPD 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
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