參數(shù)資料
型號: ISP1161ABD
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Full-speed Universal Serial Bus single-chip host and device controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝: 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數(shù): 45/134頁
文件大?。?/td> 587K
代理商: ISP1161ABD
Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
45 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
10.1.2
HcControl register (R/W: 01H/81H)
The HcControl register defines the operating modes for the HC.
RemoteWakeupEnable (RWE) is modified only by the HCD.
Code (Hex): 01 —
read
Code (Hex): 81 —
write
Table 8:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcRevision register: bit allocation
31
30
29
28
27
26
25
24
reserved
0
R
23
0
R
22
0
R
21
0
R
20
0
R
19
0
R
18
0
R
17
0
R
16
reserved
0
R
15
0
R
14
0
R
13
0
R
12
0
R
11
0
R
10
0
R
9
0
R
8
reserved
0
R
7
0
R
6
0
R
5
0
R
4
0
R
3
0
R
2
0
R
1
0
R
0
REV[7:0]
0
R
0
R
0
R
1
R
0
R
0
R
0
R
0
R
Table 9:
Bit
31 to 8
7 to 0
HcRevision register: bit description
Symbol
Description
Reserved
REV[7:0]
Revision:
This read-only field contains the BCD representation of
the version of the HCI specification that is implemented by this HC.
For example, a value of 11H corresponds to version 1.1. All HC
implementations that are compliant with this specification will have
a value of 10H.
Table 10:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcControl register: bit allocation
31
30
29
28
27
26
25
24
reserved
0
0
0
0
0
0
0
0
R/W
23
R/W
22
R/W
21
R/W
20
R/W
19
R/W
18
R/W
17
R/W
16
reserved
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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