參數(shù)資料
型號(hào)： ISP1161ABD
廠商： NXP SEMICONDUCTORS
元件分類： 總線控制器
英文描述： Full-speed Universal Serial Bus single-chip host and device controller
中文描述： UNIVERSAL SERIAL BUS CONTROLLER, PQFP64
封裝： 10 X 10 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-314-2, LQFP-64
文件頁數(shù)： 100/134頁
文件大?。?/td> 587K
代理商： ISP1161ABD
Philips Semiconductors
ISP1161A
Full-speed USB single-chip host and device controller
Product data
Rev. 03 — 23 December 2004
100 of 134
9397 750 13962
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Remark:
There is no protection against writing or reading past a buffer’s boundary or
against writing into an OUT buffer or reading from an IN buffer. Any of these actions
could cause an incorrect operation. Data residing in an OUT buffer are only
meaningful after a successful transaction. Exception: during DMA access of a
double-buffered endpoint, the buffer pointer automatically points to the secondary
buffer after reaching the end of the primary buffer.
13.2.2
DcEndpointStatus register (R: 50H–5FH)
This command is used to read the status of an endpoint FIFO. The command
accesses the DcEndpointStatus register, the bit allocation of which is shown in
Table 92
. Reading the DcEndpointStatus register will clear the interrupt bit set for the
corresponding endpoint in the DcInterrupt register (see
Table 108
).
All bits of the DcEndpointStatus register are read-only. Bit EPSTAL is controlled by
the Stall/Unstall commands and by the reception of a SETUP token (see
Section 13.2.3
).
Code (Hex): 50 to 5F —
read (control OUT, control IN, endpoint 1 to 14)
Transaction —
read 1 word
Table 90:
Word #
0 (lower byte)
0 (upper byte)
1 (lower byte)
1 (upper byte)
…
M = (N + 1) DIV 2
Endpoint FIFO organization
Description
packet length (lower byte)
packet length (upper byte)
data byte 1
data byte 2
…
data byte N
Table 91:
A0
1
Example of endpoint FIFO access
Phase
Bus lines
command
D[7:0]
D[15:8]
data
D[15:0]
data
D[15:0]
data
D[15:0]
…
…
Word #
-
-
0
1
2
…
Description
command code (00H to 1FH)
ignored
packet length
data word 1 (data byte 2, data byte 1)
data word 2 (data byte 4, data byte 3)
…
0
0
0
…
Table 92:
Bit
Symbol
DcEndpointStatus register: bit allocation
7
6
EPSTAL
EPFULL1
5
4
3
2
1
0
EPFULL0
DATA_PID
OVER
WRITE
0
R
SETUPT
CPUBUF
reserved
Reset
Access
0
R
0
R
0
R
0
R
0
R
0
R
0
R
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ISP1161ABD,118 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BD RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABD,151 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BD RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABD,157 功能描述:USB 接口集成電路 DO NOT USE ORDER ISP1161A1BD RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1161ABD-S 功能描述:IC USB HOST CTRL FULL-SPD 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
ISP1161ABD-T 功能描述:IC USB HOST CTRL FULL-SPD 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A
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