34 FN7973.2 April 25, 2013 I2E Contr ol and S tat us 30 I2E_status Reserved I2E Settled Low AC RMS Power Low RMS Power Read only 31 " />
參數(shù)資料
型號(hào)： ISLA214S50IR1Z
廠商： Intersil
文件頁(yè)數(shù)： 28/41頁(yè)
文件大?。?/td> 0K
描述： IC ADC
標(biāo)準(zhǔn)包裝： 1
系列： *
ISLA214S50
34
FN7973.2
April 25, 2013
I2E
Contr
ol
and
S
tat
us
30
I2E_status
Reserved
I2E
Settled
Low AC
RMS
Power
Low
RMS
Power
Read only
31
I2E_control
Enable
Notch Filter
Disable
Offset
Disable
Gain
Disable
Skew
Freeze
Run
20h
32
I2E_static_control
Reserved
must be
set to 0
Skip
coarse
adj.
Reserved, must be set to 0
Should be
set to 1
01h
33-49
Reserved
4A
I2E_power_down
Notch
Filter
Power
Down
I2E
Power
Down
03h
4B
temp_counter_high
Temp Counter [10:8]
Read only
4C
temp_counter_low
Temp Counter [7:0]
Read only
4D
temp_counter_control
Enable
PD
Reset
Divider [2:0]
Select
00h
4E-4F
Reserved
50
I2E_rms_power_threshold_lsb
RMS Power Threshold, LSBs [7:0]
00h
51
I2E_rms_power_threshold_msb
RMS Power Threshold, MSBs [15:8]
10h
52
I2E_rms_hysteresis
RMS Power Hysteresis
FFh
53
I2E_ac_rms_power_threshold_ls
b
AC Power Threshold, LSBs, [7:0]
50h
54
I2E_ac_rms_power_threshold_m
sb
AC Power Threshold, MSBs, [15:8]
00h
55
I2E_ac_rms_hysteresis
AC RMS Power Hysteresis
10h
56-5F
Reserved
60
coarse_offset_init
Coarse Offset Initialization value
80h
61
fine_offset_init
Fine Offset Initialization value
80h
62
medium_gain_init
Medium Gain Initialization value
80h
63
fine_gain_init
Fine Gain Initialization value
80h
64
sample_time_skew_init
Sample Time Skew Initialization value
80h
65-6F
Reserved
70
skew_diff
Differential Skew
80h
71
phase_slip
Reserved
Next Clock
Edge
00h
72
clock_divide
Clock Divide [2:0]
000 = Pin Control
001 = divide by 1
010 = divide by 2
Other codes = Reserved
00h
NOT reset by
Soft Reset
SPI Memory Map (Continued)
ADDR.
(Hex)
PARAMETER NAME
BIT 7
(MSB)
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
(LSB)
DEF. VALUE
(HEX)
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