參數(shù)資料
型號(hào): ISL98001
廠(chǎng)商: Intersil Corporation
英文描述: Triple Video Digitizer with Digital PLL
中文描述: 三路視頻數(shù)字化與數(shù)字鎖相環(huán)
文件頁(yè)數(shù): 19/29頁(yè)
文件大?。?/td> 470K
代理商: ISL98001
19
FN6148.0
October 25, 2005
generating the signal) is subject to drift - the temperature
inside a monitor or projector can easily change 50°C
between power-on/offset calibration on a cold morning and
the temperature reached once the monitor and the monitor's
environment have reached steady state. Offset can drift
significantly over 50°C, reducing image quality and requiring
that the user do a manual calibration once the monitor has
warmed up.
In addition to drift, many AFEs exhibit interaction between
the offset and gain controls. When the gain is changed, the
magnitude of the offset is changed as well. This again
increases the complexity of the firmware as it tries to
optimize gain and offset settings for a given video input
signal. Instead of adjusting just the offset, then the gain, both
have to be adjusted interactively until the desired ADC
output is reached.
The ISL98001 simplifies offset and gain adjustment and
completely eliminates offset drift using its Automatic Black
Level Compensation (ABLC) function. ABLC monitors the
black level and continuously adjusts the ISL98001's 10-bit
offset DACs to null out the offset. Any offset, whether due to
the video source or the ISL98001's analog amplifiers, is
eliminated with 10-bit (1/4 of an ADC LSB) accuracy. Any drift
is compensated for well before it can have a visible effect.
Manual offset adjustment control is still available - an 8-bit
register allows the firmware to adjust the offset ±64 codes in
exactly 1 ADC LSB increments. And gain is now completely
independent of offset - adjusting the gain no longer affects the
offset, so there is no longer a need to program the firmware to
cope with interactive offset and gain controls.
Finally, there should be no concerns over ABLC itself
introducing visible artifacts; it doesn't. ABLC functions at a
very low frequency, changing the offset in 1/4 LSB
increments, so it can't cause visible brightness fluctuations.
And once ABLC is locked, if the offset doesn't drift, the
DACs won't change. If desired, ABLC can be disabled,
allowing the firmware to work in the traditional way, with
10-bit offset DACs under the firmware's control.
Gain and Offset Control
To simplify image optimization algorithms, the ISL98001
features fully-independent gain and offset adjustment.
Changing the gain does not affect the DC offset, and the
weight of an Offset DAC LSB does not vary depending on
the gain setting.
The full-scale gain is set in the three 8-bit registers
(0x06-0x08). The ISL98001 can accept input signals with
amplitudes ranging from 0.35V
P-P
to 1.4V
P-P
.
The offset controls shift the entire RGB input range, changing
the input image brightness. Three separate registers provide
independent control of the R, G, and B channels. Their
nominal setting is 0x80, which forces the ADC to output code
0x00 (or 0x80 for the R (Pr) and B (Pb) channels in YPbPr
mode) during the back porch period when ABLC is enabled.
Functional Description
Inputs
The ISL98001 digitizes analog video inputs in both RGB
and Component (YPbPr) formats, with or without
embedded sync (SOG).
RGB Inputs
For RGB inputs, the black/blank levels are identical and equal
to 0V. The range for each color is typically 0V to 0.7V from
black to white. HSYNC and VSYNC are separate signals.
Component YPbPr Inputs
In addition to RGB and RGB with SOG, the ISL98001 has an
option that is compatible with the component YPbPr video
inputs typically generated by DVD players. While the
ISL98001 digitizes signals in these color spaces, it does not
perform color space conversion; if it digitizes an RGB signal,
it outputs digital RGB, while if it digitizes a YPbPr signal, it
outputs digital YCbCr, also called YUV.
The Luminance (Y) signal is applied to the Green Channel
and is processed in a manner identical to the Green input
with SOG described previously. The color difference signals
Pb and Pr are bipolar and swing both above and below the
black level. When the YPbPr mode is enabled, the black
level output for the color difference channels shifts to a mid
scale value of 0x80. Setting configuration register
0x05[2] = 1 enables the YPbPr signal processing mode of
operation.
The ISL98001 can optionally decimate the incoming data to
provide a 4:2:2 output stream (configuration register
0x18[4] = 1) as shown in Table 2.
There is also a “compatibility mode”, enabled by setting bit 3
of register 0x18 to a 1, that outputs the U and V data with the
format used by the previous generation (“X980xx”) series of
AFEs, shown in Table 3.
TABLE 1. YUV MAPPING (4:4:4)
INPUT
SIGNAL
ISL98001
INPUT
CHANNEL
ISL98001
OUTPUT
ASSIGNMENT
OUTPUT
SIGNAL
Y
Green
Green
Y
0
Y
1
Y
2
Y
3
Pb
Blue
Blue
U
0
U
1
U
2
U
3
Pr
Red
Red
V
0
V
1
V
2
V
3
TABLE 2. YUV MAPPING (4:2:2)
INPUT
SIGNAL
ISL98001
INPUT
CHANNEL
ISL98001
OUTPUT
ASSIGNMENT
OUTPUT
SIGNAL
Y
Green
Green
Y
0
Y
1
Y
2
Y
3
Pb
Blue
Blue
driven low
Pr
Red
Red
U
0
V
0
U
2
V
2
ISL98001
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