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參數(shù)資料
| 型號： | ISL9206EVAL1 |
| 廠商： | Intersil Corporation |
| 英文描述： | FlexiHash For Battery Authentication |
| 中文描述： | FlexiHash對于電池認證 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 364K |
| 代理商： | ISL9206EVAL1 |
3
FN9260.0
March 9, 2006
Pin Descriptions
VSS (Pin 1) -
System ground.
NC (Pin 2) -
No connection.
VDD (Pin 3) -
Supply voltage.
TIO (Pin 4) -
Production test I/O pin. Used only during
production testing. Must be left floating during normal
operation.
XSD (Pin 5) -
Communication bus with weak internal pull-
down to VSS. This pin is a Schmitt-trigger input and an
open-drain output. An appropriate pull-up resistor is required
on the host side.
Device Sleep Wait Time
T
SLP
From when the ‘11’ Opcode is detected to the
shut-off of the internal regulator
4
-
-
μ
s
Auto-Sleep Time-Out Period
T
ASLP
From the last transition detected on the XSD
bus to the device going into sleep mode
0.9
-
1.1
s
OTP ROM Write Time
T
EEW
From the last BT of the 2nd write data frame
to when device is ready to accept the next
instruction
-
1.8
1.9
ms
Hash Calculation Time
T
HASH
From the last BT of the Challenge Code Word
from the host to the Authentication Code
being available for read
-
1
-
BT
Soft-Reset Time
T
SRST
From the last BT of the Soft-Reset instruction
issued by the host to the falling-edge of break
command returned by device
-
-
30
μ
s
AC CHARACTERISTICS
Oscillator Clock Frequency
f
OSC
Internal bus reference clock
505
532
560
kHz
Charge Pump Clock Frequency
f
CP
Internal high speed clock (observable only in test mode)
Low-speed mode
3.6
5
6
MHz
High-speed mode
16
20
24
MHz
Electrical Specifications
Unless otherwise noted, all parameters are guaranteed over the operational supply voltage and temperature
range of the device as follows: T
A
= -20°C to 85°C; V
DD
= 2.6V to 4.8V.
(Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ISL9206
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