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參數(shù)資料
| 型號： | ISL88550AIRZ-T |
| 廠商： | INTERSIL CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Synchronous Step Down Controller with Sourcing and Sinking LDO Regulator |
| 中文描述： | SWITCHING CONTROLLER, 600 kHz SWITCHING FREQ-MAX, PQCC28 |
| 封裝： | 5 X 5 MM, ROHS COMPLIANT, PLASTIC, MO-220WHHD-1, TQFN-28 |
| 文件頁數(shù)： | 6/25頁 |
| 文件大?。?/td> | 928K |
| 代理商： | ISL88550AIRZ-T |
6
FN6168.0
October 12, 2005
NOTES:
3. Specifications to -40°C are guaranteed by design, not production tested.
4. When the inductor is in continuous conduction, the output voltage will have a DC regulation level higher than the error comparator threshold by
50% of the ripple. In discontinuous conduction, the output voltage will have a DC regulation level higher than the trip level by approximately
1.5% due to slope compensation.
5. On-time and off-time specifications are measured from 50% point to 50% point at the UGATE pin with PHASE = GND, V
BOOT
= 5V, and a 250pF
capacitor connected from UGATE to PHASE. Actual in-circuit times may differ due to MOSFET switching speeds.
Electrical Specifications
VIN = +15V, V
DD
= AV
DD
= SHDNA# = STBY# = BOOT = ILIM = 5V, OUT = REFIN = VTTI = 2.5V,
FB = SKIP# = OVP/UVP = GND. PGND1 = PGND2 = PHASE = GND, VTTS = VTT, T
ON
= OPEN, T
A
= -40°C
to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C (Note 3)
(Continued)
Note: Following are target specifications. Final limits may change as a result of characterization.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
Pin Descriptions
PIN
NAME
FUNCTION
1
TON
T
ON
On-Time Selection-Control Input. This four-level logic input sets the nominal UGATE on-time. Connect
to GND, REF, AV
DD
, or leave T
ON
unconnected to select the following nominal switching frequencies:
T
ON
= AV
DD
(200kHz)
T
ON
=OPEN (300kHz)
T
ON
= REF (450kHz)
T
ON
= GND (600kHz)
2
OVP/UVP
Overvoltage/Undervoltage Protection Control Input. This four-level logic input enables or disables the
Overvoltage and/or Undervoltage Protection. The overvoltage limit is 116% of the nominal output voltage.
The undervoltage limit is 70% of the nominal output voltage. Discharge mode is enabled when OVP is also
enabled. Connect the OVP/UVP pin to the following pins for the desired function:
OVP/UVP = AV
DD
(Enable OVP and discharge mode, enable UVP)
OVP/UVP = OPEN (Enable OVP and discharge mode, disable UVP)
OVP/UVP = REF (Disable OVP and discharge mode, enable UVP)
OVP/UVP = GND (Disable OVP and discharge mode, disable UVP)
3
REF
+2.0V Reference Voltage Output. Bypass to GND with a 0.1μF (min) bypass capacitor. REF can supply
50μA for external loads. Can be used for setting voltage for ILIM. REF turns off when SHDNA#, STBY# are
low.
4
ILIM
Current-Limit Threshold Adjustment for Buck regulator. The current-limit threshold across PGND and
PHASE is 0.1 times the voltage at ILIM. Connect ILIM to a resistive-divider (typically from REF) to set the
current-limit threshold between 25mV and 200mV (with 0.25V to 2V at ILIM). Connect to AV
DD
to select the
50mV default current-limit threshold.
5
POK1
Buck Power-Good Open-Drain Output. POK1 is low when the Buck output voltage is more than 10% above
or below the normal regulation point or during soft-start. POK1 is high impedance when the output is in
regulation and the soft-start circuit has terminated. POK1 is low in shutdown.
6
POK2
LDO Power-Good Open-Drain Output. In normal mode, POK2 is low when either VTTR or VTTS is more
than 10% above or below the normal regulation point, which is typically REFIN/2. In standby mode, POK2
responds only to VTTR input. POK2 is low in shutdown, and when VREFIN is less than 0.8V.
7
STBY#
Stand-by pin. Tie to low for low quiescent mode where the VTT output is disabled with high impedance but
the VTTR buffer is kept alive if SHDNA# is high. POK2 takes input from only VTTR in this mode. VTT is
discharged to 0V when SHDNA# = GND. PWM output can be on or off depending on the state of SHDNA#.
8
SS
Soft-Start control pin for VTT & VTTR. Connect a capacitor (C9 in Typical Application Circuit) from SS to
ground (see Soft-Start capacitor Selection). Leave SS open to disable soft-start. SS discharged to GND
when SHDNA# = GND
9
VTTS
Sensing pin for termination supply output. Normally tied to VTT pin to allow accurate regulation to the
REFIN voltage. Connected to a resistor divider from VTT to GND to regulate VTT to higher than the
REFIN voltage.
10
VTTR
Termination reference voltage. VTTR tracks the value of the VTT output.
11
PGND2
Power ground for the VTT and VTTR.
12
VTT
Termination power supply output. Tie VTT to VTTS to regulate to V
REFIN
/2.
13
VTTI
Power supply input voltage for VTT. Normally tied to output of buck regulator for DDR application.
ISL88550A
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