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參數(shù)資料
| 型號： | ISL6752 |
| 廠商： | Intersil Corporation |
| 英文描述： | Octal Buffers/Drivers With 3-State Outputs 20-PDIP -40 to 85 |
| 中文描述： | ZVS全橋電流模式PWM可調(diào)的同步整流控制 |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 436K |
| 代理商： | ISL6752 |
12
FN9181.1
March 10, 2005
Solve for the current sense resistor, R
CS
, using Equation 16.
R
CS
= 15.1
.
Determine the amount of voltage, V
e
, that must be added to
the current feedback signal using Equation 13.
Ve = 153mV
Next, determine the effect of the magnetizing current from
Equation 18.
V
CS
= 91mV
Using Equation 21, solve for the summing resistor, R9, from
CTBUF to CS.
R9 = 30.1k
Determine the new value of R
CS
, R’
CS
, using Equation 22.
R’
CS
= 15.4
The above discussion determines the minimum external
ramp that is required. Additional slope compensation may be
considered for design margin.
If the application requires deadtime less than about 500ns,
the CTBUF signal may not perform adequately for slope
compensation. CTBUF lags the CT sawtooth waveform by
300-400ns. This behavior results in a non-zero value of
CTBUF when the next half-cycle begins when the deadtime
is short.
Under these situations, slope compensation may be added
by externally buffering the CT signal as shown below.
Using CT to provide slope compensation instead of CTBUF
requires the same calculations, except that Equations 20
and 21 require modification. Equation 20 becomes:
and Equation 21 becomes:
The buffer transistor used to create the external ramp from
CT should have a sufficiently high gain (>200) so as to
minimize the required base current. Whatever base current
is required reduces the charging current into CT and will
reduce the oscillator frequency.
ZVS Full-Bridge Operation
The ISL6752 is a full-bridge zero-voltage switching (ZVS)
PWM controller that behaves much like a traditional hard-
switched topology controller. Rather than drive the diagonal
bridge switches simultaneously, the upper switches (OUTUL,
OUTUR) are driven at a fixed 50% duty cycle and the lower
switches (OUTLL, OUTLR) are pulse width modulated on
the trailing edge.
To understand how the ZVS method operates one must
include the parasitic elements of the circuit and examine a
full switching cycle.
In Figure 9, the power semiconductor switches have been
replaced by ideal switch elements with parallel diodes and
capacitance, the output rectifiers are ideal, and the
transformer leakage inductance has been included as a
discrete element. The parasitic capacitance has been
lumped together as switch capacitance, but represents all
R6
C4
R9
R
CS
CT
CT
CS
1
2
4
3
5
6
7
8
9
10
11
12
13
14
15
16
ISL6752
VREF
FIGURE 7. ADDING SLOPE COMPENSATION USING CT
V
e
V
CS
–
R6
+
R9
----------------------
=
V
(EQ. 23)
R9
2D
-----------------------–
V
e
V
CS
+
–
(
)
R6
=
(EQ. 24)
FIGURE 8. BRIDGE DRIVE SIGNAL TIMING
CT
DEADTIME
OUTLL
OUTLR
OUTUR
OUTUL
RESDEL
WINDOW
RESONANT
DELAY
PWM
PWM
PWM
PWM
FIGURE 9. IDEALIZED FULL-BRIDGE
VIN+
VIN-
UL
LL
UR
LR
VOUT+
RTN
L
L
D2
D1
ISL6752
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISL6752AAZA-T | ZVS Full-Bridge Current-Mode PWM with Adjustable Synchronous Rectifier Control |
| ISL6752AAZA | Octal Buffers/Drivers With 3-State Outputs 20-PDIP -40 to 85 |
| ISL6753 | Octal Buffers/Drivers With 3-State Outputs 20-SO -40 to 85 |
| ISL6753AAZA-T | ZVS Full-Bridge PWM Controller |
| ISL6753AAZA | Octal Buffers/Drivers With 3-State Outputs 20-SO -40 to 85 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISL6752/54EVAL1Z | 功能描述:BOARD DEMO FOR ISL6752 ISL6754 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - DC/DC 與 AC/DC（離線）SMPS 系列:- 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:True Shutdown™ 主要目的:DC/DC，步升 輸出及類型:1，非隔離 功率 - 輸出:- 輸出電壓:- 電流 - 輸出:1A 輸入電壓:2.5 V ~ 5.5 V 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):升壓 頻率 - 開關(guān):3MHz 板類型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ISL6752AAZA | 功能描述:IC REG CTRLR PWM CM 16-QSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 標(biāo)準(zhǔn)包裝:75 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:1MHz 占空比:81% 電源電壓:4.3 V ~ 13.5 V 降壓:是 升壓:是 回掃:是 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:無 工作溫度:0°C ~ 70°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 包裝:管件 產(chǎn)品目錄頁面:1051 (CN2011-ZH PDF) 其它名稱:296-2543-5 |
| ISL6752AAZAR5325 | 制造商:Intersil Corporation 功能描述:- Rail/Tube |
| ISL6752AAZA-T | 功能描述:IC REG CTRLR PWM CM 16-QSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 穩(wěn)壓器 - DC DC 切換控制器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- PWM 型:電流模式 輸出數(shù):1 頻率 - 最大:275kHz 占空比:50% 電源電壓:18 V ~ 110 V 降壓:無 升壓:無 回掃:無 反相:無 倍增器:無 除法器:無 Cuk:無 隔離:是 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 包裝:帶卷 (TR) |
| ISL6752AAZA-TR5325 | 制造商:Intersil Corporation 功能描述:ZVS Full-Bridge Current-Mode PWM with Adjustable Synchronous Rectifier Control |
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