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參數(shù)資料
| 型號(hào)： | ISL6529A |
| 廠商： | Intersil Corporation |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | Dual Regulator.Synchronous Rectified Buck PWM and Linear Power Controller |
| 中文描述： | 雙Regulator.Synchronous整流降壓PWM和線性功率控制器 |
| 文件頁數(shù)： | 6/15頁 |
| 文件大?。?/td> | 376K |
| 代理商： | ISL6529A |
6
FN9127.1
December 28, 2004
Functional Pin Descriptions
LGATE (Pin 1), (Pin 16 MLFP)
Lower gate drive output. Connect to gate of the low-side
MOSFET.
PGND (Pin 2), (Pin 1 MLFP)
This pin is the power ground return for the lower gate driver.
GND (Pin 3), (Pin 2 MLFP)
Signal ground for the IC. All voltage levels are measured with
respect to this pin. Place via close to pin to minimize
impedance path to ground plane.
5VCC (Pin 4), (Pin 3 MLFP)
Provide a well decoupled 5V bias supply for the IC to this
pin. The voltage at this pin is monitored for Power-On Reset
(POR) purposes.
DRIVE2(Pin 5), (Pin 4 MLFP)
Connect this pin to the gate terminal of an external
N-Channel MOSFET transistor. This pin provides the gate
voltage for the linear regulator pass transistor. It also
provides a means of compensating the error amplifier for
applications where the user needs to optimize the regulator
transient response.
FB2 (Pin 6), (Pin 5 MLFP)
Connect the output of the linear regulator to this pin
through a properly sized resistor divider. The voltage at this
pin is regulated to 0.8V. This pin is also monitored for
undervoltage events.
Pulling and holding FB2 above 1.28V shuts down both
regulators. Releasing FB2 initiates soft-start on both regulators.
PWM CONTROLLER GATE DRIVERS
UGATE and LGATE Maximum Voltage
V
HGATE
V
LGATE
I
GATE
I
GATE
R
DS(on)
12VCC = 12V
11
12
-
V
UGATE and LGATE Minimum Voltage
12VCC = 12V
-
0
0.5
V
UGATE and LGATE Source Current
12VCC = 12V
-
-1
-
A
UGATE and LGATE Sink Current
12VCC = 12V
-
1
-
A
UGATE and LGATE Output Impedance
12VCC = 12V
-
3.1
4.3
LINEAR REGULATOR (DRIVE2)
DC Gain
R
L
= 10k, C
L
= 10pf
R
L
= 10k, C
L
= 10pf
R
L
= 10k, C
L
= 10pf
V
FB2
= 0.8V
-
80
-
dB
Gain-Bandwidth Product
GBWP
-
15
-
MHz
Slew Rate
SR
-
6
-
V
/μ
s
FB2 Input Current
I
I
-
20
150
nA
Drive2 High Output Voltage
V
OUT
High
V
OUT
Low
I
OUT
High
I
OUT
Low
V
OV
V
UV
9.5
10.3
V
Drive2 Low Output Voltage
-
0.1
1.0
V
Drive2 High Output Source Current
-0.7
-1.4
-
mA
Drive2 Low Output Sink Current
0.85
1.2
-
mA
Over-Voltage Level (V
FB2
/V
REF
)
Under-Voltage Level (V
FB2
/V
REF
)
REGULATOR ISOLATION
Percent of Nominal
-
160
-
%
Percent of Nominal
-
51.5
-
%
Change in Linear Regulator Output Voltage
(Note 4)
Vout
Linear Output = 2.5V, 6A Load Change on PWM
-
<0.5
-
%
Change in PWM Regulator Output Voltage
(Note 4)
Vout
PWM Output = 1.5V, 1A Load Change on Linear
-
<0.5
-
%
NOTE:
4. Measured in the evaluation board.
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System
Diagrams, and Typical Application Schematic
(Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
5VCC
GND
DRIVE2
FB2
UGATE
FB
COMP
LGATE
14
13
12
11
1
2
3
4
10
9
8
5
6
7
12VCC
NC
PGND
NC
NC = NO INTERNAL CONNECTION
NC
NC
ISL6529A
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